From: Mike Rapoport <rppt@kernel•org>
To: Nathan Chancellor <nathan@kernel•org>
Cc: Andrew Morton <akpm@linux-foundation•org>,
Andreas Larsson <andreas@gaisler•com>,
Andy Lutomirski <luto@kernel•org>,
Ard Biesheuvel <ardb@kernel•org>, Arnd Bergmann <arnd@arndb•de>,
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John Paul Adrian Glaubitz <glaubitz@physik•fu-berlin.de>,
Kent Overstreet <kent.overstreet@linux•dev>,
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Subject: Re: [PATCH v5 6/8] x86/module: perpare module loading for ROX allocations of text
Date: Fri, 11 Oct 2024 15:58:04 +0300 [thread overview]
Message-ID: <Zwkg3LwlNJOwNWZh@kernel.org> (raw)
In-Reply-To: <20241010225411.GA922684@thelio-3990X>
On Thu, Oct 10, 2024 at 03:54:11PM -0700, Nathan Chancellor wrote:
> Hi Mike,
>
> On Wed, Oct 09, 2024 at 09:08:14PM +0300, Mike Rapoport wrote:
> > From: "Mike Rapoport (Microsoft)" <rppt@kernel•org>
> >
> > When module text memory will be allocated with ROX permissions, the
> > memory at the actual address where the module will live will contain
> > invalid instructions and there will be a writable copy that contains the
> > actual module code.
> >
> > Update relocations and alternatives patching to deal with it.
> >
> > Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel•org>
>
> I bisected a boot failure that I see with CONFIG_CFI_CLANG enabled to
> this change as commit be712757cabd ("x86/module: perpare module loading
> for ROX allocations of text") in -next.
> [ 0.000000] Linux version 6.12.0-rc2-00140-gbe712757cabd (nathan@n3-xlarge-x86) (ClangBuiltLinux clang version 19.1.0 (https://github.com/llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4), ClangBuiltLinux LLD 19.1.0 (https://github.com/llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)) #1 SMP PREEMPT_DYNAMIC Thu Oct 10 22:42:57 UTC 2024
> ...
> [ 0.092204] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl
> [ 0.093207] TAA: Mitigation: TSX disabled
> [ 0.093711] MMIO Stale Data: Mitigation: Clear CPU buffers
> [ 0.094228] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
> [ 0.095203] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
> [ 0.096203] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers'
> [ 0.097203] x86/fpu: Supporting XSAVE feature 0x020: 'AVX-512 opmask'
> [ 0.098003] x86/fpu: Supporting XSAVE feature 0x040: 'AVX-512 Hi256'
> [ 0.098203] x86/fpu: Supporting XSAVE feature 0x080: 'AVX-512 ZMM_Hi256'
> [ 0.099203] x86/fpu: Supporting XSAVE feature 0x200: 'Protection Keys User registers'
> [ 0.100204] x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256
> [ 0.101204] x86/fpu: xstate_offset[5]: 832, xstate_sizes[5]: 64
> [ 0.102203] x86/fpu: xstate_offset[6]: 896, xstate_sizes[6]: 512
> [ 0.103204] x86/fpu: xstate_offset[7]: 1408, xstate_sizes[7]: 1024
> [ 0.104051] x86/fpu: xstate_offset[9]: 2432, xstate_sizes[9]: 8
> [ 0.104204] x86/fpu: Enabled xstate features 0x2e7, context size is 2440 bytes, using 'compacted' format.
>
> then nothing after that. Boot is successful if CFI is not enabled (the
> initrd will just shutdown the machine after printing the version string).
>
> If there is any further information I can provide or patches I can test,
> I am more than happy to do so.
I overlooked how cfi_*_callers routines update addr.
This patch should fix it:
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 3b3fa93af3b1..cf782f431110 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -1148,11 +1148,13 @@ static int cfi_disable_callers(s32 *start, s32 *end, struct module *mod)
for (s = start; s < end; s++) {
void *addr = (void *)s + *s;
- void *wr_addr = module_writable_address(mod, addr);
+ void *wr_addr;
u32 hash;
addr -= fineibt_caller_size;
- hash = decode_caller_hash(addr);
+ wr_addr = module_writable_address(mod, addr);
+ hash = decode_caller_hash(wr_addr);
+
if (!hash) /* nocfi callers */
continue;
@@ -1172,11 +1174,12 @@ static int cfi_enable_callers(s32 *start, s32 *end, struct module *mod)
for (s = start; s < end; s++) {
void *addr = (void *)s + *s;
- void *wr_addr = module_writable_address(mod, addr);
+ void *wr_addr;
u32 hash;
addr -= fineibt_caller_size;
- hash = decode_caller_hash(addr);
+ wr_addr = module_writable_address(mod, addr);
+ hash = decode_caller_hash(wr_addr);
if (!hash) /* nocfi callers */
continue;
@@ -1249,11 +1252,12 @@ static int cfi_rand_callers(s32 *start, s32 *end, struct module *mod)
for (s = start; s < end; s++) {
void *addr = (void *)s + *s;
- void *wr_addr = module_writable_address(mod, addr);
+ void *wr_addr;
u32 hash;
addr -= fineibt_caller_size;
- hash = decode_caller_hash(addr);
+ wr_addr = module_writable_address(mod, addr);
+ hash = decode_caller_hash(wr_addr);
if (hash) {
hash = -cfi_rehash(hash);
text_poke_early(wr_addr + 2, &hash, 4);
@@ -1269,14 +1273,15 @@ static int cfi_rewrite_callers(s32 *start, s32 *end, struct module *mod)
for (s = start; s < end; s++) {
void *addr = (void *)s + *s;
- void *wr_addr = module_writable_address(mod, addr);
+ void *wr_addr;
u32 hash;
addr -= fineibt_caller_size;
- hash = decode_caller_hash(addr);
+ wr_addr = module_writable_address(mod, addr);
+ hash = decode_caller_hash(wr_addr);
if (hash) {
text_poke_early(wr_addr, fineibt_caller_start, fineibt_caller_size);
- WARN_ON(*(u32 *)(addr + fineibt_caller_hash) != 0x12345678);
+ WARN_ON(*(u32 *)(wr_addr + fineibt_caller_hash) != 0x12345678);
text_poke_early(wr_addr + fineibt_caller_hash, &hash, 4);
}
/* rely on apply_retpolines() */
> Cheers,
> Nathan
--
Sincerely yours,
Mike.
next prev parent reply other threads:[~2024-10-11 13:02 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-09 18:08 [PATCH v5 0/8] x86/module: use large ROX pages for text allocations Mike Rapoport
2024-10-09 18:08 ` [PATCH v5 1/8] mm: vmalloc: group declarations depending on CONFIG_MMU together Mike Rapoport
2024-10-10 6:54 ` Christoph Hellwig
2024-10-09 18:08 ` [PATCH v5 2/8] mm: vmalloc: don't account for number of nodes for HUGE_VMAP allocations Mike Rapoport
2024-10-10 6:54 ` Christoph Hellwig
2024-10-09 18:08 ` [PATCH v5 3/8] asm-generic: introduce text-patching.h Mike Rapoport
2024-10-10 6:55 ` Christoph Hellwig
2024-10-10 7:22 ` Geert Uytterhoeven
2024-10-10 8:04 ` Arnd Bergmann
2024-10-09 18:08 ` [PATCH v5 4/8] module: prepare to handle ROX allocations for text Mike Rapoport
2024-10-09 22:23 ` Song Liu
2024-10-10 5:43 ` Mike Rapoport
2024-10-10 17:18 ` Song Liu
2024-10-09 18:08 ` [PATCH v5 5/8] arch: introduce set_direct_map_valid_noflush() Mike Rapoport
2024-10-10 6:56 ` Christoph Hellwig
2024-10-09 18:08 ` [PATCH v5 6/8] x86/module: perpare module loading for ROX allocations of text Mike Rapoport
2024-10-10 6:57 ` Christoph Hellwig
2024-10-10 22:54 ` Nathan Chancellor
2024-10-11 12:58 ` Mike Rapoport [this message]
2024-10-15 8:29 ` Nathan Chancellor
2024-10-09 18:08 ` [PATCH v5 7/8] execmem: add support for cache of large ROX pages Mike Rapoport
2024-10-09 20:24 ` Andrew Morton
2024-10-10 9:29 ` Mike Rapoport
2024-10-10 6:58 ` Christoph Hellwig
2024-10-10 12:57 ` Mike Rapoport
2024-10-11 7:46 ` Christoph Hellwig
2024-10-13 8:43 ` Mike Rapoport
2024-10-14 3:26 ` Andrew Morton
2024-10-14 19:16 ` Luis Chamberlain
2024-10-15 4:09 ` Luis Chamberlain
2024-10-15 5:54 ` Mike Rapoport
2024-10-15 20:11 ` Luis Chamberlain
2024-10-16 10:40 ` Mike Rapoport
2024-10-16 23:58 ` Luis Chamberlain
2024-10-14 5:55 ` Christoph Hellwig
2024-10-14 13:07 ` Mike Rapoport
2024-10-10 18:35 ` Kees Bakker
2024-10-09 18:08 ` [PATCH v5 8/8] x86/module: enable ROX caches for module text Mike Rapoport
2024-10-10 8:30 ` Bisected: " Sergey Senozhatsky
2024-10-10 15:20 ` Mike Rapoport
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