From: Lukas Wunner <lukas@wunner•de>
To: Bjorn Helgaas <helgaas@kernel•org>
Cc: linux-pci@vger•kernel.org,
Christian Zigotzky <chzigotzky@xenosoft•de>,
Manivannan Sadhasivam <mani@kernel•org>,
mad skateman <madskateman@gmail•com>,
"R . T . Dickinson" <rtd2@xtra•co.nz>,
Darren Stevens <darren@stevens-zone•net>,
John Paul Adrian Glaubitz <glaubitz@physik•fu-berlin.de>,
luigi burdo <intermediadc@hotmail•com>, Al <al@datazap•net>,
Roland <rol7and@gmx•com>, Hongxing Zhu <hongxing.zhu@nxp•com>,
hypexed@yahoo•com.au, linuxppc-dev@lists•ozlabs.org,
debian-powerpc@lists•debian.org, linux-kernel@vger•kernel.org,
Bjorn Helgaas <bhelgaas@google•com>
Subject: Re: [PATCH 0/2] PCI/ASPM: Allow quirks to avoid L0s and L1
Date: Fri, 7 Nov 2025 07:33:31 +0100 [thread overview]
Message-ID: <aQ2Su6wp5DWlkEgb@wunner.de> (raw)
In-Reply-To: <20251106183643.1963801-1-helgaas@kernel.org>
On Thu, Nov 06, 2025 at 12:36:37PM -0600, Bjorn Helgaas wrote:
> L1 PM Substates and Clock PM in particular are a problem because they
> depend on CLKREQ# and sometimes device-specific configuration, and none of
> this is discoverable in a generic way.
According to PCIe r7.0 sec 7.5.3.7, the "Enable Clock Power Management"
bit is "applicable only for Upstream Ports and with form factors that
support a Clock Request (CLKREQ#) mechanism".
Thus, if BIOS has set the "Enable Clock Power Management" bit
on a Downstream Port, we can infer that CLKREQ# is supported.
Thanks,
Lukas
prev parent reply other threads:[~2025-11-07 6:33 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-06 18:36 [PATCH 0/2] PCI/ASPM: Allow quirks to avoid L0s and L1 Bjorn Helgaas
2025-11-06 18:36 ` [PATCH 1/2] PCI/ASPM: Cache Link Capabilities so quirks can override them Bjorn Helgaas
2025-11-07 1:17 ` Shawn Lin
2025-11-07 6:03 ` Manivannan Sadhasivam
2025-11-07 5:32 ` Lukas Wunner
2025-11-07 15:25 ` Bjorn Helgaas
2025-11-06 18:36 ` [PATCH 2/2] PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports Bjorn Helgaas
2025-11-07 5:35 ` Lukas Wunner
2025-11-07 6:09 ` Manivannan Sadhasivam
2025-11-07 21:55 ` Bjorn Helgaas
2025-11-06 23:45 ` [PATCH 0/2] PCI/ASPM: Allow quirks to avoid L0s and L1 Bjorn Helgaas
2025-11-07 2:33 ` Hongxing Zhu
2025-11-07 5:40 ` Manivannan Sadhasivam
2025-11-07 6:33 ` Lukas Wunner [this message]
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