From: Roland Dreier <rdreier@cisco•com>
To: Benjamin Herrenschmidt <benh@kernel•crashing.org>
Cc: Scott Wood <scottwood@freescale•com>,
"linuxppc-dev@ozlabs•org" <linuxppc-dev@ozlabs•org>,
Rex Feany <RFeany@mrv•com>
Subject: Re: [PATCH 04/10] 8xx: Always pin kernel instruction TLB
Date: Sat, 14 Nov 2009 22:49:47 -0800 [thread overview]
Message-ID: <adalji8cmes.fsf@roland-alpha.cisco.com> (raw)
In-Reply-To: <1258234866.2140.451.camel@pasglop> (Benjamin Herrenschmidt's message of "Sun, 15 Nov 2009 08:41:06 +1100")
> > How to make better use of the remaining ITLB slots is tricky.
> > Somehow one would want to map at lest one to modules but I cannot see how.
>
> No. If you use modules, you pay the price. Sane embedded solutions
> running in "tight" environments don't use modules :-) No point pinning
> TLB entries on the vmalloc space, really.
Long ago (2.4 days I think) when using modules on ppc 4xx we hacked the
module_alloc function (or whatever it was called back then) to allocate
space in the kernel pinned TLB instead of using vmalloc. Gave something
like a 2x speedup for module code, since the 4xx TLB is so small and the
miss handling is so expensive. I assume it should still be possible to
do a similar hack with current kernels.
- R.
next prev parent reply other threads:[~2009-11-15 6:49 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-14 10:42 [PATCH 00/10] Fix 8xx MMU/TLB Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 01/10] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 02/10] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 03/10] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 05/10] 8xx: Fixup DAR from buggy dcbX instructions Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 06/10] 8xx: Add missing Guarded setting in DTLB Error Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 07/10] 8xx: Restore _PAGE_WRITETHRU Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 08/10] 8xx: start using dcbX instructions in various copy routines Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 09/10] 8xx: Remove DIRTY pte handling in DTLB Error Joakim Tjernlund
2009-11-14 10:42 ` [PATCH 10/10] 8xx: DTLB Miss cleanup Joakim Tjernlund
2009-11-14 18:08 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Dan Malek
2009-11-14 19:08 ` Joakim Tjernlund
2009-11-14 21:41 ` Benjamin Herrenschmidt
2009-11-15 6:49 ` Roland Dreier [this message]
2009-11-15 16:08 ` Joakim Tjernlund
-- strict thread matches above, loose matches on Subject: below --
2009-11-15 17:09 [PATCH 00/10] Fix 8xx MMU/TLB Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 01/10] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 02/10] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 03/10] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-15 17:09 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2009-11-20 10:21 [PATCH 00/10 v6] Fix 8xx MMU/TLB Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 01/10] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 02/10] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 03/10] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-20 10:21 ` [PATCH 04/10] 8xx: Always pin kernel instruction TLB Joakim Tjernlund
2009-12-09 4:19 ` Benjamin Herrenschmidt
2009-12-09 7:39 ` Joakim Tjernlund
2009-12-09 8:56 ` Benjamin Herrenschmidt
2009-12-09 9:24 ` Joakim Tjernlund
2009-12-29 15:10 ` Joakim Tjernlund
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