Subject: RE: [PATCH v10 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer (CIL)

From: Keshava Munegowda <[email-masked]>
Date: Tue, 5 Apr 2011 12:38:03 +0530

> -----Original Message-----
> From: Sergei Shtylyov [mailto:[email-masked]]
> Sent: Saturday, April 02, 2011 12:26 AM
> To: Tirumala Marri
> Cc: Keshava Munegowda; [email-masked];
[email-masked]; [email-masked];
> Fushen Chen; Mark Miesfeld
> Subject: Re: [PATCH v10 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core
Interface Layer (CIL)
>
> Hello.
>
> Tirumala Marri wrote:
>
> >>> +void dwc_otg_core_init(struct core_if *core_if)
> >>> +{
> >>> +	u32 i;
> >>> +	ulong global_reg = core_if->core_global_regs;
> >>> +	struct device_if *dev_if = core_if->dev_if;
> >>> +	u32 ahbcfg = 0;
> >>> +	u32 i2cctl = 0;
> >>> +	u32 gusbcfg;
>
> >> Tabify the declarations ;
>
> > [Marri] When I checked again in my source, I do see the tabs added
before
> > declarations.
>
>     He means that tabs should be between the variable's type and name,
but
> there's no such requirement actually.

I am sorry if there is no such requirement, since I had such comments and
I fixed it and
Now I have commented.

Keshava Munegowda