Subject: Re: RFC: NAPI packet weighting patch

From: "Michael Chan" <[email-masked]>
Date: Fri, 03 Jun 2005 13:35:22 -0700

On Fri, 2005-06-03 at 22:59 +0200, Lennert Buytenhek wrote:
> On Fri, Jun 03, 2005 at 12:49:29PM -0700, Michael Chan wrote:
> 
> > Yes, in tg3, rx buffers are replenished and put back into the ring
> > as completed packets are taken off the ring. But we don't tell the
> > chip about these new buffers until we get to the end of the loop,
> > potentially after a full quota of packets.
> 
> Which makes a lot more sense, since you'd rather do one MMIO write
> at the end of the loop than one per iteration, especially if your
> MMIO read (flush) latency is high.  (Any subsequent MMIO read will
> have to flush out all pending writes, which'll be slow if there's
> a lot of writes still in the queue.)
> 
I agree on the merit of issuing only one IO at the end. What I'm saying
is that doing so will make it similar to e1000 where all the buffers are
replenished at the end. Isn't that so or am I missing something?

By the way, in tg3 there is a buffer replenishment threshold programmed
to the chip and is currently set at rx_pending / 8 (200/8 = 25). This
means that the chip will replenish 25 rx buffers at a time.