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From: "Michael Chan" <mchan@broadcom•com>
To: "David Miller" <davem@davemloft•net>
Cc: linville@tuxdriver•com, netdev@vger•kernel.org
Subject: Re: [PATCH 6/9][TG3]: Add basic 5906 support.
Date: Wed, 27 Sep 2006 16:21:01 -0700	[thread overview]
Message-ID: <1159399261.3411.45.camel@rh4> (raw)
In-Reply-To: <20060927.160836.74560378.davem@davemloft.net>

On Wed, 2006-09-27 at 16:08 -0700, David Miller wrote:

> > @@ -491,6 +513,9 @@ static inline void tg3_cond_int(struct t
> >  	if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) &&
> >  	    (tp->hw_status->status & SD_STATUS_UPDATED))
> >  		tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT);
> > +	else
> > +		tw32(HOSTCC_MODE, tp->coalesce_mode |
> > +		     (HOSTCC_MODE_ENABLE | HOSTCC_MODE_NOW));
> >  }
> >  
> >  static void tg3_enable_ints(struct tg3 *tp)
> 
> Why are we forcing a coalescing event here now?  This seems
> to apply in quite a large number of cases.  It will trigger
> if either:
> 
> 1) using tagged status
> 2) SD_STATUS_UPDATED is not indicated in the status block
> 
> In particular, how is this a 5906 specific support change
> when there are no 5906 or other chipset conditionals guarding
> the logic here?
> 

It was found that on rare occasions, the 5906 will miss the first
interrupt after reset without the COALESCE_NOW.  It was also felt that
other chips may also have this problem, and therefore it is a good and a
safe thing to do for all chips using the tagged mode.

This call is only made after resetting the chip, and so there's no
performance impact at all during run-time.


  reply	other threads:[~2006-09-27 23:24 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-09-27 20:34 [PATCH 6/9][TG3]: Add basic 5906 support Michael Chan
2006-09-27 23:08 ` David Miller
2006-09-27 23:21   ` Michael Chan [this message]
2006-09-28  0:03     ` David Miller

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