Subject: Re: Porting the ibm_newemac driver to use phylib (and other PHY/MAC questions)

From: Benjamin Herrenschmidt <[email-masked]>
Date: Mon, 04 May 2009 08:14:54 +1000

On Sun, 2009-05-03 at 00:26 -0400, Kyle Moffett wrote:

> Ok, I've dug through the docs on the 460EPx (the CPU I'm using), and
> I'd like some confirmation of the following:
> 
> *  The EMAC hardware itself internally has its own dedicated
> MDIO/MDClk lines, driven by the STACR register.

Yes, though not all EMACs cells have this wired to anything. For
example, the 405EP has 2 EMACs but only EMAC0 has MDIO, which is
used to control both PHYs. Later variants multiplex the MDIOs via
a programmable switch in the ZMII or RGMII though.

> *  On many/most cpus, there is only a single set of external
> MDIO/MDClk pins, driven either off the ZMII bridge or the RGMII
> bridge.

Yes, though on the very old ones, the ZMII bridge is effectively
invisible (if it exists at all) and only EMAC0 MDIO pins are wired out.

> *  Both bridge-types have their own internal register for switching
> the external MDIO/MDClk pins between the two sets of internal
> EMAC<=>bridge links.

Yes.

> *  Some SoCs have both an ZMII and an RGMII bridge, and the external
> MDIO/MDClk pins are only connected to one of the two bridges (How do I
> know which one?  Alternatively, do I just program both and hope for
> the best?).

That's been my approach so far :-)

> *  Some older SoCs simply export the MDIO/MDClk pins from one of their
> internal EMAC chips and don't bother with running it through the
> multiplexing bridge.

Yes.

> Are there any SoCs which actually export the MDIO/MDClk pins from
> both/all of their EMACs?

I don't know of such a beast.

Cheers,
Ben.

> Cheers,
> Kyle Moffett