Subject: Re: CRC endianess problem on DGE-510T

From: Ben Hutchings <[email-masked]>
Date: Fri, 10 Jun 2011 13:35:01 +0100

On Fri, 2011-06-10 at 10:03 +0200, Daniel Hellstrom wrote:
> Hello,
> 
> I'm having problems with the PCI network board D-LINK DGE-510T on 
> SPARC32/LEON. The CRC calculated by ether_crc_le() does not match the 
> CRC, however after swapping the result it matches. This is the same 
> behaviour with the 3 boards I have. After applying the patch below 
> everything works.
> 
> Does anyone know if this is a correct patch or has had similar problems 
> on big endian machines?

No idea about this hardware, but it looks reasonable - the contents of
the EEPROM are treated as being in little-endian order, except when
reading the CRC for comparison.

> Daniel
> 
> 
> 
> 
> From: Daniel Hellstrom <[email-masked]>
> Date: Wed, 6 Apr 2011 15:01:44 +0200
> [PATCH] dl2k: EEPROM CRC calculation wrong endianess on bigendian machine
> 
> Signed-off-by: Daniel Hellstrom <[email-masked]>
> ---
>  drivers/net/dl2k.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/net/dl2k.c b/drivers/net/dl2k.c
> index c445457..4bbbd7b 100644
> --- a/drivers/net/dl2k.c
> +++ b/drivers/net/dl2k.c
> @@ -346,7 +346,7 @@ parse_eeprom (struct net_device *dev)
>         if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) {  /* D-Link Only */
>                 /* Check CRC */
>                 crc = ~ether_crc_le (256 - 4, sromdata);
> -               if (psrom->crc != crc) {
> +               if (psrom->crc != cpu_to_le32(crc)) {q

q?

Ben.

>                         printk (KERN_ERR "%s: EEPROM data CRC error.\n",
>                                         dev->name);
>                         return -1;
> --
> 1.5.4
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-- 
Ben Hutchings, Senior Software Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.