From: Tariq Toukan <ttoukan.linux@gmail•com>
To: Tariq Toukan <tariqt@nvidia•com>,
"David S. Miller" <davem@davemloft•net>,
Jakub Kicinski <kuba@kernel•org>, Paolo Abeni <pabeni@redhat•com>,
Eric Dumazet <edumazet@google•com>
Cc: netdev@vger•kernel.org, Saeed Mahameed <saeedm@nvidia•com>,
Gal Pressman <gal@nvidia•com>,
Leon Romanovsky <leonro@nvidia•com>,
Daniel Jurgens <danielj@nvidia•com>,
Parav Pandit <parav@nvidia•com>, William Tu <witu@nvidia•com>
Subject: Re: [PATCH net V2 1/7] net/mlx5: IFC updates for changing max EQs
Date: Sun, 30 Jun 2024 10:30:18 +0300 [thread overview]
Message-ID: <1308ffe4-e700-47fc-a6db-217b7206377d@gmail.com> (raw)
In-Reply-To: <20240627180240.1224975-2-tariqt@nvidia.com>
On 27/06/2024 21:02, Tariq Toukan wrote:
> From: Daniel Jurgens <danielj@nvidia•com>
>
> Expose new capability to support changing the number of EQs available
> to other functions.
>
> Fixes: 93197c7c509d ("mlx5/core: Support max_io_eqs for a function")
> Signed-off-by: Daniel Jurgens <danielj@nvidia•com>
> Reviewed-by: Parav Pandit <parav@nvidia•com>
> Reviewed-by: William Tu <witu@nvidia•com>
> Signed-off-by: Tariq Toukan <tariqt@nvidia•com>
> ---
> include/linux/mlx5/mlx5_ifc.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
> index 5df52e15f7d6..d45bfb7cf81d 100644
> --- a/include/linux/mlx5/mlx5_ifc.h
> +++ b/include/linux/mlx5/mlx5_ifc.h
> @@ -2029,7 +2029,11 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
> u8 pcc_ifa2[0x1];
> u8 reserved_at_3f1[0xf];
>
> - u8 reserved_at_400[0x400];
> + u8 reserved_at_400[0x40];
> +
> + u8 reserved_at_440[0x8];
> + u8 max_num_eqs_24b[0x18];
> + u8 reserved_at_460[0x3a0];
> };
>
> enum mlx5_ifc_flow_destination_type {
Hi,
Please note that this is expected to conflict with net-next commit:
99be56171fa9 net/mlx5e: SHAMPO, Re-enable HW-GRO.
Resolution is
u8 reserved_at_400[0x1];
u8 min_mkey_log_entity_size_fixed_buffer_valid[0x1];
u8 reserved_at_402[0x1e];
u8 reserved_at_420[0x20];
u8 reserved_at_440[0x8];
u8 max_num_eqs_24b[0x18];
u8 reserved_at_460[0x3a0];
Thanks,
Tariq
next prev parent reply other threads:[~2024-06-30 7:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 18:02 [PATCH net V2 0/7] mlx5 fixes 2024-06-27 Tariq Toukan
2024-06-27 18:02 ` [PATCH net V2 1/7] net/mlx5: IFC updates for changing max EQs Tariq Toukan
2024-06-30 7:30 ` Tariq Toukan [this message]
2024-06-27 18:02 ` [PATCH net V2 2/7] net/mlx5: Use max_num_eqs_24b capability if set Tariq Toukan
2024-06-27 18:02 ` [PATCH net V2 3/7] net/mlx5: Use max_num_eqs_24b when setting max_io_eqs Tariq Toukan
2024-06-27 18:02 ` [PATCH net V2 4/7] net/mlx5: E-switch, Create ingress ACL when needed Tariq Toukan
2024-06-27 18:02 ` [PATCH net V2 5/7] net/mlx5e: Add mqprio_rl cleanup and free in mlx5e_priv_cleanup() Tariq Toukan
2024-06-27 18:02 ` [PATCH net V2 6/7] net/mlx5e: Present succeeded IPsec SA bytes and packet Tariq Toukan
2024-06-27 18:02 ` [PATCH net V2 7/7] net/mlx5e: Approximate IPsec per-SA payload data bytes count Tariq Toukan
2024-06-28 12:00 ` [PATCH net V2 0/7] mlx5 fixes 2024-06-27 patchwork-bot+netdevbpf
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