Subject: Re: [PATCH net-next 1/1] net: dsa: qca8k: Fix internal PHY MDIO address

From: Christian Lamparter <[email-masked]>
Date: Fri, 22 Mar 2019 01:05:00 +0100

On Friday, March 22, 2019 12:01:20 AM CET Marek Behun wrote:
> > Hm, it's not really a "external mode". But let's try one more time.
> > The idea is that if an external mdio-bus (from the SoC) has already
> > registered the PHY 0x0 - 0x4 from the QCA8337, the qca8k should not
> > expose the same PHYs as it's own mdio-bus because then the PHYs end
> > up being registered twice.
> 
> Hi,
> yes, I understand this bit. What I was talking about was that the MDIO
> addresses of internal PHYs are 0 to 4, it does not matter if you access
> them via switch or directly. But the current code for direct access is
> using addresses 1 to 5, which does not work at all. It should also
> substract 1 from the port number.
> 
I think you clipped the part that explained what's wrong the code:

|If you look at the mdio-bus communications during boot you can definitly see
|the funkyness: every PHY gets initialized twice. You can also see this
|"duplication" in /sys/class/mdio_bus. In this directory you'll have a mdio-bus
|from the SoC and another one dsa-0:0 from the qca8k. If you look into those
|you'll notice that their both the same.
|
|As for why this happend. I think I found the culprit in a "missed"
|requirement from one of Andrew Lunn's reponses to the initial qca8k patch:
|<https://lore.kernel.org/patchwork/patch/715974/#902734>
|
|In this post, he described the Device-Tree dts configuration we use today.
|But at the end he requests: 
|"and remove the phy_read() and phy_write() functions."

TL;DR: the current qca8k_phy_(read|write) are wrong and need to be
removed. 

But you should be able to test this in V4 easily (CC'd you there).
You only need Patch 3/4 (and keep your dts the way it is). Anyway,
that's it for now until tomorrow. 

Cheers,
Christian