Subject: Re: Route cache performance under stress

From: "David S. Miller" <[email-masked]>
Date: Mon, 09 Jun 2003 03:13:41 -0700 (PDT)

From: Andi Kleen <[email-masked]>
   Date: Mon, 9 Jun 2003 12:13:02 +0200

   On Mon, Jun 09, 2003 at 03:03:34AM -0700, David S. Miller wrote:
   > True, but the real bug is that we're initializing any of this
   > crap here at all.  Right now we write over the same cachelines
   > 3 or so times.  It should really just happen once.
   
   It's unlikely to be the reason for the profile hit on a modern x86.
   They are all really fast at reading/writing L1. 
   
It's store buffer compression that's being messed up.  I've seen this
on just about any processor.

This is also why the net/core/skbuff.c initialization hacks are so
effective as well.

Trust me, this has every symptom of excess store buffer traffic :)