Subject: [PATCH 07/18] e1000: reorder pci-e infor struct

From: "Kok, Auke" <[email-masked]>
Date: Wed, 01 Nov 2006 09:51:44 -0800

Order pci-e capability struct according to bus/pci bus width ordering
preserving the hard pci spec numbers.

Signed-off-by: Auke Kok <[email-masked]>
Signed-off-by: Jeff Kirsher <[email-masked]>
---

 drivers/net/e1000/e1000_hw.h |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 31bea32..f247f26 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -128,11 +128,13 @@ typedef enum {
 /* PCI bus widths */
 typedef enum {
     e1000_bus_width_unknown = 0,
+    /* These PCIe values should literally match the possible return values
+     * from config space */
+    e1000_bus_width_pciex_1 = 1,
+    e1000_bus_width_pciex_2 = 2,
+    e1000_bus_width_pciex_4 = 4,
     e1000_bus_width_32,
     e1000_bus_width_64,
-    e1000_bus_width_pciex_1,
-    e1000_bus_width_pciex_2,
-    e1000_bus_width_pciex_4,
     e1000_bus_width_reserved
 } e1000_bus_width;

---
Auke Kok <[email-masked]>