From: Stephen Hemminger <shemminger@vyatta•com>
To: Eric Dumazet <eric.dumazet@gmail•com>
Cc: Jesse Brandeburg <jesse.brandeburg@gmail•com>,
Jesper Dangaard Brouer <hawk@diku•dk>,
netdev@vger•kernel.org
Subject: Re: [RFC] skb align patch
Date: Mon, 21 Sep 2009 21:30:11 -0700 [thread overview]
Message-ID: <20090921213011.704e0594@nehalam> (raw)
In-Reply-To: <4AB71980.4020208@gmail.com>
On Mon, 21 Sep 2009 08:13:20 +0200
Eric Dumazet <eric.dumazet@gmail•com> wrote:
> Stephen Hemminger a écrit :
> > Based on the Intel suggestion that PCI-express overhead is
> > a significant cost.
> >
> > Would people doing performance please measure the impact of
> > changing SKB alignment (64 bit only).
>
> I had this idea some time ago when I hit a limit on bnx2 adapter
> (Giga bit link, BCM5708S), with small packets. pktgen was able
> to send ~500 Mbps 'only', or 700kps if I remember well.
> So I tried to align the pktgen build packet to a cache line,
> it gave no difference at all, but it was on a 32 bit kernel.
> (Thus my patch was for pktgen only, not a generic one as yours)
>
> Could you elaborate why this change could be useful on 64bit ?
>
It is useful on all architecture where unaligned CPU access is
relatively cheap.
The issue is that a unaligned DMA requires a read/modify/write
cache line access versus just a write access. I am not a bus
expert, but writes are probably more pipelined as well.
--
next prev parent reply other threads:[~2009-09-22 4:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-20 21:22 [RFC] skb align patch Stephen Hemminger
2009-09-21 6:13 ` Eric Dumazet
2009-09-22 4:30 ` Stephen Hemminger [this message]
2009-09-22 3:20 ` Eric Dumazet
2009-09-22 5:23 ` Stephen Hemminger
2009-09-22 5:29 ` David Miller
2009-09-23 5:47 ` Thomas Graf
2009-09-25 22:18 ` Herbert Xu
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