From: James Hogan <james.hogan@mips•com>
To: David Daney <ddaney@caviumnetworks•com>
Cc: David Daney <david.daney@cavium•com>, <linux-mips@linux-mips•org>,
<ralf@linux-mips•org>, <netdev@vger•kernel.org>,
"David S. Miller" <davem@davemloft•net>,
Rob Herring <robh+dt@kernel•org>,
Mark Rutland <mark.rutland@arm•com>, <devel@driverdev•osuosl.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation•org>,
<linux-kernel@vger•kernel.org>,
"Steven J. Hill" <steven.hill@cavium•com>,
<devicetree@vger•kernel.org>, Andrew Lunn <andrew@lunn•ch>,
Florian Fainelli <f.fainelli@gmail•com>,
Carlos Munoz <cmunoz@cavium•com>
Subject: Re: [PATCH v4 2/8] MIPS: Octeon: Enable LMTDMA/LMTST operations.
Date: Thu, 30 Nov 2017 22:56:15 +0000 [thread overview]
Message-ID: <20171130225614.GJ27409@jhogan-linux.mipstec.com> (raw)
In-Reply-To: <54c83e6b-35e2-be38-e4f1-87eb420938cb@caviumnetworks.com>
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On Thu, Nov 30, 2017 at 01:49:43PM -0800, David Daney wrote:
> On 11/30/2017 01:36 PM, James Hogan wrote:
> > On Tue, Nov 28, 2017 at 04:55:34PM -0800, David Daney wrote:
> >> Signed-off-by: Carlos Munoz <cmunoz@cavium•com>
> >> Signed-off-by: Steven J. Hill <Steven.Hill@cavium•com>
> >> Signed-off-by: David Daney <david.daney@cavium•com>
> >> ---
> >> arch/mips/cavium-octeon/setup.c | 6 ++++++
> >> arch/mips/include/asm/octeon/octeon.h | 12 ++++++++++--
> >> 2 files changed, 16 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
> >> index a8034d0dcade..99e6a68bc652 100644
> >> --- a/arch/mips/cavium-octeon/setup.c
> >> +++ b/arch/mips/cavium-octeon/setup.c
> >> @@ -609,6 +609,12 @@ void octeon_user_io_init(void)
> >> #else
> >> cvmmemctl.s.cvmsegenak = 0;
> >> #endif
> >> + if (OCTEON_IS_OCTEON3()) {
> >> + /* Enable LMTDMA */
> >> + cvmmemctl.s.lmtena = 1;
> >> + /* Scratch line to use for LMT operation */
> >> + cvmmemctl.s.lmtline = 2;
> >
> > Out of curiosity, is there significance to the value 2 and associated
> > virtual address 0xffffffffffff8100, or is it pretty arbitrary?
>
> Yes, there is significance.
>
> CPU local memory starts at 0xffffffffffff8000, each line is 0x80 bytes.
> so the 2nd line starts at 0xffffffffffff8100
What I mean is, why is 2 chosen instead of any other value?
Cheers
James
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next prev parent reply other threads:[~2017-11-30 22:56 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-29 0:55 [PATCH v4 0/8] Cavium OCTEON-III network driver David Daney
2017-11-29 0:55 ` [PATCH v4 1/8] dt-bindings: Add Cavium Octeon Common Ethernet Interface David Daney
[not found] ` <20171129005540.28829-2-david.daney-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
2017-11-29 2:01 ` Andrew Lunn
2017-11-29 2:54 ` David Daney
2017-11-29 0:55 ` [PATCH v4 2/8] MIPS: Octeon: Enable LMTDMA/LMTST operations David Daney
2017-11-30 21:36 ` James Hogan
[not found] ` <20171130213635.GH27409-4bYivNCBEGSP4qXr0kR+DFHK5/nzsB32@public.gmane.org>
2017-11-30 21:49 ` David Daney
2017-11-30 22:56 ` James Hogan [this message]
[not found] ` <20171130225614.GJ27409-4bYivNCBEGSP4qXr0kR+DFHK5/nzsB32@public.gmane.org>
2017-11-30 23:09 ` David Daney
[not found] ` <c90ac3a5-7230-38ff-691a-3d94a25702cd-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-11-30 23:12 ` James Hogan
2017-11-29 0:55 ` [PATCH v4 3/8] MIPS: Octeon: Add a global resource manager David Daney
[not found] ` <20171129005540.28829-4-david.daney-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
2017-11-30 22:53 ` James Hogan
2017-12-01 1:51 ` David Daney
2017-12-01 7:53 ` Philippe Ombredanne
2017-12-01 17:42 ` David Daney
2017-12-01 19:49 ` Philippe Ombredanne
2017-12-01 20:01 ` David Daney
2017-12-01 20:41 ` Philippe Ombredanne
2017-12-01 20:56 ` David Daney
[not found] ` <1c34c7f5-4237-0fca-e871-ee18c262a3f3-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-12-01 23:33 ` Philippe Ombredanne
2017-11-29 0:55 ` [PATCH v4 4/8] MIPS: Octeon: Add Free Pointer Unit (FPA) support David Daney
2017-11-29 0:55 ` [PATCH v4 5/8] MIPS: Octeon: Automatically provision CVMSEG space David Daney
2017-11-29 0:55 ` [PATCH v4 6/8] staging: octeon: Remove USE_ASYNC_IOBDMA macro David Daney
2017-12-07 14:28 ` Greg Kroah-Hartman
2017-11-29 0:55 ` [PATCH v4 7/8] netdev: octeon-ethernet: Add Cavium Octeon III support David Daney
[not found] ` <20171129005540.28829-8-david.daney-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
2017-11-29 10:30 ` Souptick Joarder
2017-11-29 13:47 ` Andrew Lunn
2017-11-29 16:07 ` Souptick Joarder
2017-11-29 19:11 ` Dan Carpenter
2017-11-29 22:16 ` Andrew Lunn
[not found] ` <CAFqt6zZAPxKm663yEHD0Rx2SPye9Nvoax0RMroDQuF8BpZchsA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-29 19:20 ` David Daney
2017-11-30 7:12 ` Souptick Joarder
2017-11-29 22:56 ` Andrew Lunn
2017-11-29 23:04 ` David Daney
2017-11-29 0:55 ` [PATCH v4 8/8] MAINTAINERS: Add entry for drivers/net/ethernet/cavium/octeon/octeon3-* David Daney
2017-11-29 14:18 ` [PATCH v4 0/8] Cavium OCTEON-III network driver David Miller
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