From: Andrew Lunn <andrew@lunn•ch>
To: Linus Walleij <linus.walleij@linaro•org>
Cc: "Vivien Didelot" <vivien.didelot@savoirfairelinux•com>,
"Florian Fainelli" <f.fainelli@gmail•com>,
netdev@vger•kernel.org, openwrt-devel@lists•openwrt.org,
"LEDE Development List" <lede-dev@lists•infradead.org>,
"Antti Seppälä" <a.seppala@gmail•com>,
"Roman Yeryomin" <roman@advem•lv>,
"Colin Leitner" <colin.leitner@googlemail•com>,
"Gabor Juhos" <juhosg@openwrt•org>
Subject: Re: [PATCH 1/4 RFCv2] net: phy: realtek: Support RTL8366RB variant
Date: Tue, 29 May 2018 14:34:44 +0200 [thread overview]
Message-ID: <20180529123444.GD10919@lunn.ch> (raw)
In-Reply-To: <20180528174752.6806-2-linus.walleij@linaro.org>
On Mon, May 28, 2018 at 07:47:49PM +0200, Linus Walleij wrote:
> The RTL8366RB is an ASIC with five internal PHYs for
> LAN0..LAN3 and WAN. The PHYs are spawn off the main
> device so they can be handled in a distributed manner
> by the Realtek PHY driver. All that is really needed
> is the power save feature enablement and letting the
> PHY driver core pick up the IRQ from the switch chip.
>
> Cc: Antti Seppälä <a.seppala@gmail•com>
> Cc: Roman Yeryomin <roman@advem•lv>
> Cc: Colin Leitner <colin.leitner@googlemail•com>
> Cc: Gabor Juhos <juhosg@openwrt•org>
> Cc: Florian Fainelli <f.fainelli@gmail•com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro•org>
> ---
> ChangeLog RFCv1->RFCv2:
> - No real changes.
> ---
> drivers/net/phy/realtek.c | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> index 9f48ecf9c627..21624d1c9d38 100644
> --- a/drivers/net/phy/realtek.c
> +++ b/drivers/net/phy/realtek.c
> @@ -37,6 +37,9 @@
> #define RTL8201F_ISR 0x1e
> #define RTL8201F_IER 0x13
>
> +#define RTL8366RB_POWER_SAVE 0x21
> +#define RTL8366RB_POWER_SAVE_ON 0x1000
> +
> MODULE_DESCRIPTION("Realtek PHY driver");
> MODULE_AUTHOR("Johnson Leung");
> MODULE_LICENSE("GPL");
> @@ -145,6 +148,22 @@ static int rtl8211f_config_init(struct phy_device *phydev)
> return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val);
> }
>
> +static int rtl8366rb_config_init(struct phy_device *phydev)
> +{
> + int ret;
> + u16 reg;
> +
> + ret = genphy_config_init(phydev);
> + if (ret < 0)
> + return ret;
> +
> + reg = phy_read(phydev, RTL8366RB_POWER_SAVE);
> + reg |= RTL8366RB_POWER_SAVE_ON;
> + phy_write(phydev, RTL8366RB_POWER_SAVE, reg);
> +
> + return 0;
> +}
> +
> static struct phy_driver realtek_drvs[] = {
> {
> .phy_id = 0x00008201,
> @@ -207,6 +226,18 @@ static struct phy_driver realtek_drvs[] = {
> .resume = genphy_resume,
> .read_page = rtl821x_read_page,
> .write_page = rtl821x_write_page,
> + }, {
> + /* The main part of this DSA is in drivers/net/dsa */
Hi Linus
I would not bother with this comment. We don't say, The main part of
this driver is in drivers/net/ethernet/... PHY drivers should be
completely separate to MAC drivers.
Otherwise this looks good.
Andrew
> + .phy_id = 0x001cc961,
> + .name = "RTL8366RB Gigabit Ethernet",
> + .phy_id_mask = 0x001fffff,
> + .features = PHY_GBIT_FEATURES,
> + .flags = PHY_HAS_INTERRUPT,
> + .config_aneg = &genphy_config_aneg,
> + .config_init = &rtl8366rb_config_init,
> + .read_status = &genphy_read_status,
> + .suspend = genphy_suspend,
> + .resume = genphy_resume,
> },
> };
>
> @@ -218,6 +249,7 @@ static struct mdio_device_id __maybe_unused realtek_tbl[] = {
> { 0x001cc914, 0x001fffff },
> { 0x001cc915, 0x001fffff },
> { 0x001cc916, 0x001fffff },
> + { 0x001cc961, 0x001fffff },
> { }
> };
>
> --
> 2.17.0
>
next prev parent reply other threads:[~2018-05-29 12:34 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-28 17:47 [PATCH 0/4 RFCv2] Realtek SMI RTL836x DSA driver Linus Walleij
2018-05-28 17:47 ` [PATCH 1/4 RFCv2] net: phy: realtek: Support RTL8366RB variant Linus Walleij
2018-05-29 12:34 ` Andrew Lunn [this message]
2018-05-29 18:51 ` [1/4,RFCv2] " Heiner Kallweit
2018-05-29 20:01 ` Linus Walleij
2018-05-29 20:17 ` Andrew Lunn
2018-05-29 21:15 ` Heiner Kallweit
2018-05-28 17:47 ` [PATCH 2/4 RFCv2] net: dsa: Add bindings for Realtek SMI DSAs Linus Walleij
2018-05-28 18:54 ` Andrew Lunn
2018-05-29 19:30 ` Florian Fainelli
2018-05-28 17:47 ` [PATCH 3/4 RFCv2] net: dsa: realtek-smi: Add Realtek SMI driver Linus Walleij
2018-05-28 19:33 ` Andrew Lunn
2018-05-28 19:45 ` Andrew Lunn
2018-05-28 17:47 ` [PATCH 4/4 RFCv2] ARM: dts: Add ethernet and switch to D-Link DIR-685 Linus Walleij
2018-05-28 18:20 ` [PATCH 0/4 RFCv2] Realtek SMI RTL836x DSA driver Andrew Lunn
2018-05-29 8:49 ` Linus Walleij
2018-05-29 12:24 ` Andrew Lunn
2018-05-29 18:41 ` Linus Walleij
2018-05-29 18:57 ` [OpenWrt-Devel] " Kevin Darbyshire-Bryant
2018-05-29 19:47 ` Linus Walleij
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