Subject: [PATCH 2/3] net: dsa: mt7530: optional setting CPU field in MFC register

From: [email-masked]
Date: Fri, 30 Nov 2018 17:57:36 +1000

From: Greg Ungerer <[email-masked]>

Some versions of the MediaTek MT7530 switch have a CPU port number and
enable bit in their MFC register. The MT7530 instance on the MediaTek
MT7621 SoC is one that does for example. The switch will not work
without these fields being correctly setup on these devices.

Create a new devicetree tag, mediatek,mfc-has-cpuport, that signifies
that this device needs the CPU port field and enable bit set when the
port is enabled.

Signed-off-by: Greg Ungerer <[email-masked]>
---
 drivers/net/dsa/mt7530.c | 9 +++++++++
 drivers/net/dsa/mt7530.h | 4 ++++
 2 files changed, 13 insertions(+)

diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 532240c4bef9..e41ada47233a 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -689,6 +689,10 @@ mt7530_cpu_port_enable(struct mt7530_priv *priv,
 	/* Unknown unicast frame fordwarding to the cpu port */
 	mt7530_set(priv, MT7530_MFC, UNU_FFP(BIT(port)));
 
+	/* Set CPU port number */
+	if (priv->mfccpu)
+		mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
+
 	/* CPU port gets connected to all user ports of
 	 * the switch
 	 */
@@ -1380,6 +1384,11 @@ mt7530_probe(struct mdio_device *mdiodev)
 			 "MT7530 with no CLOCK or REGULATOR control\n");
 	}
 
+	/* Use mediatek,mfc-has-cpuport to distinguish hardware where the MFC
+	 * register has a CPU port number field setting.
+	 */
+	priv->mfccpu = of_property_read_bool(dn, "mediatek,mfc-has-cpuport");
+
 	/* Not MCM that indicates switch works as the remote standalone
 	 * integrated circuit so the GPIO pin would be used to complete
 	 * the reset, otherwise memory-mapped register accessing used
diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
index ee97944c4507..cbc0725c4258 100644
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -36,6 +36,9 @@
 #define  UNM_FFP(x)			(((x) & 0xff) << 16)
 #define  UNU_FFP(x)			(((x) & 0xff) << 8)
 #define  UNU_FFP_MASK			UNU_FFP(~0)
+#define  CPU_EN				BIT(7)
+#define  CPU_PORT(x)			((x) << 4)
+#define  CPU_MASK			(0xf << 4)
 
 /* Registers for address table access */
 #define MT7530_ATA1			0x74
@@ -432,6 +435,7 @@ struct mt7530_priv {
 	struct gpio_desc	*reset;
 	bool			mcm;
 	bool			clkreg;
+	bool			mfccpu;
 
 	struct mt7530_port	ports[MT7530_NUM_PORTS];
 	/* protect among processes for registers access*/
-- 
2.17.1