Subject: Re: [PATCH 2/3] net: macb: add support for C45 MDIO read/write

From: Andrew Lunn <[email-masked]>
Date: Wed, 27 Nov 2019 19:51:29 +0100

On Wed, Nov 27, 2019 at 06:31:54PM +0000, [email-masked] wrote:
> On 26/11/2019 at 15:37, Andrew Lunn wrote:
> > On Tue, Nov 26, 2019 at 09:09:49AM +0000, Milind Parab wrote:
> >> This patch modify MDIO read/write functions to support
> >> communication with C45 PHY.
> > 
> > I think i've asked this before, at least once, but you have not added
> > it to the commit messages. Do all generations of the macb support C45?
> 
> For what I can tell from the different IP revisions that we implemented 
> throughout the years in Atmel then Microchip products (back to 
> at91rm9200 and at91sam9263), it seems yes.
> 
> The "PHY Maintenance Register" "MACB_MAN_*" was always present with the 
> same bits 32-28 layout (with somehow different names).
> 
> But definitively we would need to hear that from Cadence itself which 
> would be far better.

Hi Nicolas

Thanks, that is useful.

I'm just trying to avoid backward compatibility issues, somebody
issues a C45 request on old silicon and it all goes horribly wrong.

       Andrew