Subject: Re: [BUG] mv88e6xxx: tx regression in v5.3

From: Marek Behún <[email-masked]>
Date: Wed, 18 Dec 2019 15:30:35 +0100

Hi Baruch,

On Sun, 15 Dec 2019 12:13:25 +0200
Baruch Siach <[email-masked]> wrote:

> Thanks. That is enough to fix the phylink issue triggered by commit
> 7fb5a711545 ("net: dsa: mv88e6xxx: drop adjust_link to enabled
> phylink").
> 
> The Clearfog GT-8K DT has also this on the cpu side:
> 
> &cp1_eth2 {
>         status = "okay";
>         phy-mode = "2500base-x";
>         phys = <&cp1_comphy5 2>;
>         fixed-link {
>                 speed = <2500>;
>                 full-duplex;
>         };
> };
> 
> Should I drop fixed-link here as well?

I would think yes. phy-mode = 2500base-x should already force 2500mbps,
the fixed-link should be irrelevant. Whether this is truly the case I
do not know, but on Turris Mox I do not use fixed-link with these.

> 
> The call to mv88e6341_port_set_cmode() introduced in commit
> 7a3007d22e8 ("net: dsa: mv88e6xxx: fully support SERDES on Topaz
> family") still breaks port 5 (cpu) configuration. When called, its
> mode parameter is set to PHY_INTERFACE_MODE_2500BASEX (19).
> 
> Any idea?

I shall look into this. On Turris Mox this works, so I will have to do
some experiments.

> Thanks,
> baruch
> 
> --
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