Subject: Re: [PATCH net-next 0/10] net: dsa: improve serdes integration

From: Russell King - ARM Linux admin <[email-masked]>
Date: Thu, 5 Mar 2020 23:45:57 +0000

On Thu, Mar 05, 2020 at 11:54:07PM +0100, Andrew Lunn wrote:
> On Thu, Mar 05, 2020 at 12:41:39PM +0000, Russell King - ARM Linux admin wrote:
> > Andrew Lunn mentioned that the Serdes PCS found in Marvell DSA switches
> > does not automatically update the switch MACs with the link parameters.
> > Currently, the DSA code implements a work-around for this.
> > 
> > This series improves the Serdes integration, making use of the recent
> > phylink changes to support split MAC/PCS setups.  One noticable
> > improvement for userspace is that ethtool can now report the link
> > partner's advertisement.
> 
> Hi Russel
> 
> I started testing this patchset today. But ran into issues with ZII
> scu4-aib and ZII devel c. I think the CPU port is running at the wrong
> speed, but i'm not sure yet. Nor do i know if it is this patchset, or
> something earlier.

It could be this patch set; remember the integration of phylink into
DSA for CPU and inter-switch ports is already broken, particularly
for links that do not specify any fixed-link properties.

For ZII platforms, the fixed link parameters are specified, so this
should not be the case.

You should see a call to .mac_config() followed by a call to
.mac_link_up(), so you should be seeing:

mv88e6085 0.1:00: Link is Up - 100Mbps/Full - flow control off

somewhere in the kernel messages.

For the DSA ports, there's no fixed-link parameters, so the above
integration broke those by trying to set speed=0 duplex=0 on the
DSA ports - so don't expect the other bridges to work irrespective
of whether this series is applied or not.

FYI, the port status and control register for the CPU port on the
ZII rev C should be:

0 = 0xd04
1 = 0x203d

-- 
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