Subject: Re: [PATCH net-next 0/10] net: dsa: improve serdes integration

From: Andrew Lunn <[email-masked]>
Date: Fri, 6 Mar 2020 02:13:10 +0100

> FYI, the port status and control register for the CPU port on the
> ZII rev C should be:
> 
> 0 = 0xd04
> 1 = 0x203d

Hi Russell

I've been testing Devel C, port lan1. So port 1 on the first switch.

net-next/master from a few hours ago ping's out that interface.  So
the CPU/DSA phylink breakage is not part of this problem.

net-next/master + this patchset no longer pings.

Register dump for the CPU port shows:

0: 0e04
1: 203d

The e indicates 1000Mbs, where as it should be 100Mbs. However, as i
said, the datasheet suggests this might not be a problem?

I will try to figure out which patch broke it.

  Andrew