Subject: Re: [PATCH net-next 0/10] net: dsa: improve serdes integration

From: Andrew Lunn <[email-masked]>
Date: Mon, 9 Mar 2020 13:40:18 +0100

> Yep - it comes from the poor integration of phylink into DSA for CPU
> and inter-DSA ports which is already causing regressions in today's
> kernels. That needs resolving somehow before this patch series can
> be merged, but it isn't something that can be fixed from the phylink
> side of things.

Hi Russell

What do you think about my proposal to solve it? Only instantiate
phylink for CPU and DSA ports if there is a fixed-link or phy-handle
in DT?

I also looked at the code before this integration. I had the open
question of if it was possible to just have a phy-mode property,
without fixed link. And the answer is no.

So i will formally propose my solution.

   Andrew