Subject: Re: [PATCH] net: dsa: mv88e6xxx: Allow MAC configuration for ports with internal PHY

From: Russell King - ARM Linux admin <[email-masked]>
Date: Mon, 22 Jun 2020 20:43:33 +0100

On Mon, Jun 22, 2020 at 09:16:59PM +0200, Daniel Mack wrote:
> Hi Russell,
> 
> On 6/22/20 8:58 PM, Russell King - ARM Linux admin wrote:
> > On Mon, Jun 22, 2020 at 08:44:51PM +0200, Daniel Mack wrote:
> >> On 6/22/20 8:41 PM, Andrew Lunn wrote:
> 
> >>> How are you trying to change the speed?
> >>
> >> With ethtool for instance. But all userspace tools are bailing out early
> >> on this port for the reason I described.
> > 
> > A simple "return" to ignore a call in a void function won't have that
> > effect.
> 
> It has the effect that mv88e6xxx_port_setup_mac() is currently not being
> called from mv88e6xxx_mac_config().

Which is correct.

> > I don't see an issue here:
> > 
> > # ethtool -s lan1 autoneg off speed 10 duplex half
> 
> I've tried that of course, but that doesn't fix the problem here. Which
> switch port does 'lan1' map to in your setup? My CPU port maps to port 4.

This is a clearfog, it maps to the port closest to the SFP port.

> Correct me if I'm mistaken, but speed and duplex settings are only being
> communicated to the MAC driver through the aforementioned chain of
> calls, right?

No, as I explained, the PPU (which is hardware inside the switch)
takes care of keeping the switch port in sync with the internal
PHY.

> > I've also been able to change what is advertised just fine, and the
> > link comes up as expected - in fact, I was running one of the switch
> > ports at 10Mbps to one of my machines and using the 'scope on the
> > ethernet signals over the weekend to debug a problem, which turned
> > out to be broken RGMII clock delay timings.
> 
> To recap, my setup features a Cadence GEM that is connected to a 88E1510
> PHY which is then connected to port 4 of the switch (which has an
> internal PHY) through a transformer-less link. I know this is not
> optimal as the speed is limited to 100M by that, but that was the only
> way as all other ports where used up.

So you have:

switch port <--> internal switch PHY <--> 88E1510 <--> Cadence GEM

and the switch will poll its internal PHY for the status of the link
between the two PHYs.  You should _not_ attach the 88E1510 to the
switch port - it is on the Cadence side of the link, and it should
be up to the Cadence end to manage that PHY, and not the switch side.

This is not much different than the inter-PHY transformer-less link
being a conventional RJ45 cable, except you want to operate the
switch port in "CPU" mode so that management frames are forwarded
out that link?

> The setup works just fine in principle, I'm just struggling with a
> correct way of configuring the drivers to allow that setting.

Right, so this is something new, and a setup we haven't seen before,
so likely it isn't supported.

I wonder if the PPU is being turned off by the fact that the port is
placed into "CPU" mode - I don't know off hand, I don't know the
Marvell DSA code all that well to be able to pull that knowledge out
of the top of my head, and I don't have time right now to read the
code to find out - I'm supposed to be on a Zoom meeting as of 15
minutes ago.

> I can control what is advertised on eth0, which is the GEM, and the PHY
> there reports the correct link speed:
> 
> 
> # ethtool -s eth0 advertise 0x008
> [   79.573992] macb e000b000.ethernet eth0: Link is Down
> [   79.637048] mv88e6085 e000b000.ethernet-ffffffff:02: Link is Down
> [   81.221974] macb e000b000.ethernet eth0: Link is Up - 100Mbps/Full -
> flow control off
> [   81.285639] mv88e6085 e000b000.ethernet-ffffffff:02: Link is Up -
> 100Mbps/Full - flow control off
> 
> However, the MAC in the switch is not changed by that, and it was forced
> to 1 Gbit at probe time of the driver. Hence no packets are being seen
> by the GEM, even though the PHYs seem to see each other just fine
> (traffic is also signaled by an LED on the 88E1510).
> 
> I'm happy to try other solutions of course.

I think this is going to be something that will need discussion with
the DSA folk, given that it's an entirely new setup that hasn't been
catered for.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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