Subject: Re: [PATCH v5 2/6] dt-bindings: net: can: binding for CTU CAN FD open-source IP core.

From: Rob Herring <[email-masked]>
Date: Mon, 24 Aug 2020 20:18:34 -0600

On Sat, Aug 15, 2020 at 09:43:04PM +0200, Pavel Pisa wrote:
> The device-tree bindings for open-source/open-hardware CAN FD IP core
> designed at the Czech Technical University in Prague.
> 
> CTU CAN FD IP core and other CTU CAN bus related projects
> listing and documentation page
> 
>    http://canbus.pages.fel.cvut.cz/
> 
> Signed-off-by: Pavel Pisa <[email-masked]>
> ---
>  .../bindings/net/can/ctu,ctucanfd.yaml        | 63 +++++++++++++++++++
>  1 file changed, 63 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
> new file mode 100644
> index 000000000000..6fa42112bb58
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license please:

(GPL-2.0-only OR BSD-2-Clause)

With that,

Reviewed-by: Rob Herring <[email-masked]>

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: CTU CAN FD Open-source IP Core Device Tree Bindings
> +
> +description: |
> +  Open-source CAN FD IP core developed at the Czech Technical University in Prague
> +
> +  The core sources and documentation on project page
> +    [1] sources : https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
> +    [2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/Progdokum.pdf
> +
> +  Integration in Xilinx Zynq SoC based system together with
> +  OpenCores SJA1000 compatible controllers
> +    [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top
> +  Martin Jerabek dimploma thesis with integration and testing
> +  framework description
> +    [4] PDF : https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf
> +
> +maintainers:
> +  - Pavel Pisa <[email-masked]>
> +  - Ondrej Ille <[email-masked]>
> +  - Martin Jerabek <[email-masked]>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: ctu,ctucanfd-2
> +          - const: ctu,ctucanfd
> +      - const: ctu,ctucanfd
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    description: |
> +      phandle of reference clock (100 MHz is appropriate
> +      for FPGA implementation on Zynq-7000 system).
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    ctu_can_fd_0: can@43c30000 {
> +      compatible = "ctu,ctucanfd";
> +      interrupts = <0 30 4>;
> +      clocks = <&clkc 15>;
> +      reg = <0x43c30000 0x10000>;
> +    };
> -- 
> 2.20.1
>