Subject: [PATCH net-next 6/7] net: phy: marvell10g: support more rate matching modes

From: Marek Behún <[email-masked]>
Date: Wed, 24 Mar 2021 17:50:22 +0100

The 88X3310P supports rate matching mode also for XAUI and RXAUI.

Signed-off-by: Marek Behún <[email-masked]>
---
 drivers/net/phy/marvell10g.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index b4f9831b4db6..c764795a142a 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -596,13 +596,22 @@ static void mv3310_update_interface(struct phy_device *phydev)
 {
 	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
 
-	/* In "XFI with Rate Matching" mode the PHY interface is fixed at
-	 * 10Gb. The PHY adapts the rate to actual wire speed with help of
+	/* In all of the "* with Rate Matching" modes the PHY interface is fixed
+	 * at 10Gb. The PHY adapts the rate to actual wire speed with help of
 	 * internal 16KB buffer.
 	 */
-	if (priv->mactype == MV_V2_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH) {
+	switch (priv->mactype) {
+	case MV_V2_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH:
 		phydev->interface = PHY_INTERFACE_MODE_10GBASER;
 		return;
+	case MV_V2_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH:
+		phydev->interface = PHY_INTERFACE_MODE_XAUI;
+		return;
+	case MV_V2_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH:
+		phydev->interface = PHY_INTERFACE_MODE_RXAUI;
+		return;
+	default:
+		break;
 	}
 
 	if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||
-- 
2.26.2