Subject: Re: [PATCH RFC net-next] net: phy: marvell10g: add downshift tunable support

From: "Russell King (Oracle)" <[email-masked]>
Date: Tue, 20 Jul 2021 15:30:46 +0100

On Tue, Jul 20, 2021 at 04:28:12PM +0200, Andrew Lunn wrote:
> > +static int mv3310_set_downshift(struct phy_device *phydev, u8 ds)
> > +{
> > +	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
> > +	u16 val;
> > +	int err;
> > +
> > +	/* Fails to downshift with v0.3.5.0 and earlier */
> > +	if (priv->firmware_ver < MV_VERSION(0,3,5,0))
> > +		return -EOPNOTSUPP;
> > +
> > +	if (ds == DOWNSHIFT_DEV_DISABLE)
> > +		return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1,
> > +					  MV_PCS_DSC1_ENABLE);
> > +
> > +	/* FIXME: The default is disabled, so should we disable? */
> > +	if (ds == DOWNSHIFT_DEV_DEFAULT_COUNT)
> > +		ds = 2;
> 
> Interesting question.
> 
> It is a useful feature, so i would enable it by default.
> 
> Is it possible to read the actual speed via some vendor register?  The
> phy-core might then give a warning, but it is 50/50 since the link
> peer might perform the downshift.

We already do read the actual negotiated speed anbd other parameters
from the MV_PCS_CSSR1 register.

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