Subject: Re: [PATCH net-next 09/12] ARM: dts: r9a06g032: describe MII converter

From: Clément Léger <[email-masked]>
Date: Fri, 15 Apr 2022 10:24:53 +0200

Le Fri, 15 Apr 2022 01:22:01 +0200,
Andrew Lunn <[email-masked]> a écrit :

> On Thu, Apr 14, 2022 at 02:22:47PM +0200, Clément Léger wrote:
> > Add the MII converter node which describes the MII converter that is
> > present on the RZ/N1 SoC.  
> 
> Do you have a board which actually uses this? I just noticed that
> renesas,miic-cfg-mode is missing, it is a required property, but maybe
> the board .dts file provides it?
> 
>     Andrew

Hi Andrew, yes, I have a board that defines and use that. The
renesas,miic-cfg-mode actually configures the muxes that are present on
the SoC. They allows to mux the various ethernet components (Sercos
Controller, HSR Controller, Ethercat, GMAC1, RTOS-GMAC).
All these muxes are actually controller by a single register
CONVCTRL_MODE. You can actually see the muxes that are present in the
manual [1] at Section 8 and the CONVCTRL_MODE possible values are listed
on page 180.

This seems to be something that is board dependent because the muxing
controls the MII converter outputs which depends on the board layout.

I'm open to any modification for this setup which does not really fit
any abstraction that I may have seen.

[1]
https://www.renesas.com/us/en/document/mah/rzn1d-group-rzn1s-group-rzn1l-group-users-manual-system-introduction-multiplexing-electrical-and

-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com