Subject: Re: FWD: Re: [PATCH net-next v1 1/1] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable

From: Vladimir Oltean <[email-masked]>
Date: Tue, 11 Apr 2023 14:35:16 +0300

On Tue, Apr 11, 2023 at 02:16:09PM +0300, Vladimir Oltean wrote:
> I may have missed something.

Maybe I'm wrong, but my blind intuition says that when autoneg is
disabled in the integrated PHYs, flow control _is_ by default forced off
per port, unless the "Force Flow Control" bit from Port N Control 2
registers is set. So that can be used to still support:
- ethtool --pause swp0 autoneg off rx on tx on
- ethtool --pause swp0 autoneg off rx off tx off
- ethtool --pause swp0 autoneg on # asymmetric RX/TX combinations depend upon autoneg

I may be wrong; I don't have the hardware and the ethtool pause autoneg
bit is not 100% clear to me.