Subject: Re: [PATCH net-next v2 5/6] net: txgbe: Implement phylink pcs

From: kernel test robot <[email-masked]>
Date: Mon, 17 Apr 2023 22:47:27 +0800

Hi Jiawen,

kernel test robot noticed the following build warnings:

[auto build test WARNING on net-next/main]

url:    https://github.com/intel-lab-lkp/linux/commits/Jiawen-Wu/net-txgbe-Add-software-nodes-to-support-phylink/20230411-173314
patch link:    https://lore.kernel.org/r/20230411092725.104992-6-jiawenwu%40trustnetic.com
patch subject: [PATCH net-next v2 5/6] net: txgbe: Implement phylink pcs
config: riscv-randconfig-r042-20230417 (https://download.01.org/0day-ci/archive/20230417/[email-masked]/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project 9638da200e00bd069e6dd63604e14cbafede9324)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv64-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/5903347a21d42b4f2d632e08e04890d7f638a947
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jiawen-Wu/net-txgbe-Add-software-nodes-to-support-phylink/20230411-173314
        git checkout 5903347a21d42b4f2d632e08e04890d7f638a947
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/net/ethernet/wangxun/txgbe/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email-masked]>
| Link: https://lore.kernel.org/oe-kbuild-all/[email-masked]/

All warnings (new ones prefixed by >>):

>> drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c:269:6: warning: variable 'ret' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
           if (interface == txgbe->interface)
               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c:325:9: note: uninitialized use occurs here
           return ret;
                  ^~~
   drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c:269:2: note: remove the 'if' if its condition is always false
           if (interface == txgbe->interface)
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c:267:9: note: initialize the variable 'ret' to silence this warning
           int ret, val;
                  ^
                   = 0
   1 warning generated.

vim +269 drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

   259	
   260	static int txgbe_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
   261				    phy_interface_t interface,
   262				    const unsigned long *advertising,
   263				    bool permit_pause_to_mac)
   264	{
   265		struct txgbe *txgbe = container_of(pcs, struct txgbe, pcs);
   266		struct wx *wx = txgbe->wx;
   267		int ret, val;
   268	
 > 269		if (interface == txgbe->interface)
   270			goto out;
   271	
   272		/* Wait xpcs power-up good */
   273		ret = read_poll_timeout(pcs_read, val,
   274					(val & TXGBE_PCS_DIG_STS_PSEQ_ST) ==
   275					TXGBE_PCS_DIG_STS_PSEQ_ST_GOOD,
   276					10000, 1000000, false,
   277					txgbe, MDIO_MMD_PCS, TXGBE_PCS_DIG_STS);
   278		if (ret < 0) {
   279			wx_err(wx, "xpcs power-up timeout.\n");
   280			return ret;
   281		}
   282	
   283		/* Disable xpcs AN-73 */
   284		pcs_write(txgbe, MDIO_MMD_AN, MDIO_CTRL1, 0);
   285	
   286		/* Disable PHY MPLLA for eth mode change(after ECO) */
   287		txgbe_ephy_write(txgbe, TXGBE_SUP_DIG_MPLLA_OVRD_IN_0, 0x243A);
   288		WX_WRITE_FLUSH(wx);
   289		usleep_range(1000, 2000);
   290	
   291		/* Set the eth change_mode bit first in mis_rst register
   292		 * for corresponding LAN port
   293		 */
   294		wr32(wx, TXGBE_MIS_RST, TXGBE_MIS_RST_LAN_ETH_MODE(wx->bus.func));
   295	
   296		switch (interface) {
   297		case PHY_INTERFACE_MODE_10GBASER:
   298			txgbe_pma_config_10gbaser(txgbe);
   299			break;
   300		case PHY_INTERFACE_MODE_1000BASEX:
   301			txgbe_pma_config_1000basex(txgbe);
   302			break;
   303		default:
   304			break;
   305		}
   306	
   307		pcs_write(txgbe, MDIO_MMD_PCS, TXGBE_PCS_DIG_CTRL1,
   308			  TXGBE_PCS_DIG_CTRL1_VR_RST | TXGBE_PCS_DIG_CTRL1_EN_VSMMD1);
   309		/* wait phy initialization done */
   310		ret = read_poll_timeout(pcs_read, val,
   311					!(val & TXGBE_PCS_DIG_CTRL1_VR_RST),
   312					100000, 10000000, false,
   313					txgbe, MDIO_MMD_PCS, TXGBE_PCS_DIG_CTRL1);
   314		if (ret < 0)
   315			wx_err(wx, "PHY initialization timeout.\n");
   316	
   317		txgbe->interface = interface;
   318	
   319	out:
   320		if (interface == PHY_INTERFACE_MODE_1000BASEX) {
   321			txgbe_setup_adv(txgbe, interface, advertising);
   322			txgbe_set_an37_ability(txgbe);
   323		}
   324	
   325		return ret;
   326	}
   327	

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