Subject: Re: [PATCH RFC net-next 1/6] net: phy: realtek: configure SerDes mode for rtl822x/8251b PHYs

From: Marek Behún <[email-masked]>
Date: Fri, 1 Mar 2024 10:24:53 +0100

On Thu, 29 Feb 2024 16:34:08 +0000
Daniel Golle <[email-masked]> wrote:

> On Thu, Feb 29, 2024 at 01:50:10PM +0100, Marek Behún wrote:
> > On Tue, 27 Feb 2024 10:36:05 +0000
> > "Russell King (Oracle)" <[email-masked]> wrote:
> >   
> > > > +	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
> > > > +	if (ret < 0)
> > > > +		return ret;    
> > > 
> > > It would be nice to know what this is doing.  
> > 
> > No documentation for this from Realtek, I guess this was just taken
> > from SDK originally.  
> 
> There is an additional datasheet for RTL8226B/RTL8221B called
> "SERDES MODE SETTING FLOW APPLICATION NOTE" where this sequence to
> setup interface and rate adapter mode, and also the sequence to
> disable (H)SGMII in-band-status are described.
> 
> However, there is no documentation about the meaning of registers
> and bits, it's literally just magic numbers and pseudo-code.

Thanks, Daniel.

Eric, can you mention this in the code in a comment?

Marek