Subject: Re: [PATCH 4/6] net: stmmac: dwmac-s32cc: add basic NXP S32G/S32R glue

From: Simon Horman <[email-masked]>
Date: Mon, 5 Aug 2024 18:00:02 +0100

On Sun, Aug 04, 2024 at 08:50:10PM +0000, Jan Petrous (OSS) wrote:
> NXP S32G2xx/S32G3xx and S32R45 are automotive grade SoCs
> that integrate one or two Synopsys DWMAC 5.10/5.20 IPs.
> 
> The basic driver supports only RGMII interface.
> 
> Signed-off-by: Jan Petrous (OSS) <[email-masked]>

...

> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c

...

> +static int s32cc_gmac_init(struct platform_device *pdev, void *priv)
> +{
> +	struct s32cc_priv_data *gmac = priv;
> +	int ret;
> +
> +	ret = clk_set_rate(gmac->tx_clk, GMAC_TX_RATE_125M);
> +	if (!ret)
> +		ret = clk_prepare_enable(gmac->tx_clk);
> +
> +	if (ret) {
> +		dev_err(&pdev->dev, "Can't set tx clock\n");
> +		return ret;
> +	}
> +
> +	ret = clk_prepare_enable(gmac->rx_clk);
> +	if (ret)
> +		dev_dbg(&pdev->dev, "Can't set rx, clock source is disabled.\n");
> +	else
> +		gmac->rx_clk_enabled = true;
> +
> +	ret = s32cc_gmac_write_phy_intf_select(gmac);
> +	if (ret) {
> +		dev_err(&pdev->dev, "Can't set PHY interface mode\n");

Should operations on tx_clk and rx_clk be unwound here?

Flagged by Smatch.

> +		return ret;
> +	}
> +
> +	return 0;
> +}

...

> +static int s32cc_dwmac_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct plat_stmmacenet_data *plat;
> +	struct s32cc_priv_data *gmac;
> +	struct stmmac_resources res;
> +	int ret;

Please consider arranging local variables in Networking code
in reverse xmas tree order - longest line to shortest.

Flagged by: https://github.com/ecree-solarflare/xmastree

> +
> +	gmac = devm_kzalloc(&pdev->dev, sizeof(*gmac), GFP_KERNEL);
> +	if (!gmac)
> +		return PTR_ERR(gmac);

This will return 0, perhaps return -ENOMEM ?

Flagged by Smatch.

...