Subject: Re: [PATCH net-next 07/10] net: mvneta: convert to phylink EEE implementation

From: Simon Horman <[email-masked]>
Date: Fri, 13 Dec 2024 10:22:11 +0000

On Fri, Dec 13, 2024 at 10:04:15AM +0000, Simon Horman wrote:
> On Mon, Dec 09, 2024 at 02:23:48PM +0000, Russell King (Oracle) wrote:
> > Convert mvneta to use phylink's EEE implementation, which means we just
> > need to implement the two methods for LPI control, and adding the
> > initial configuration.
> > 
> > Disabling LPI requires clearing a single bit. Enabling LPI needs a full
> > configuration of several values, as the timer values are dependent on
> > the MAC operating speed.
> > 
> > As Armada 388 states that EEE is only supported in "SGMII" modes, mark
> > this in lpi_interfaces. Testing with RGMII on the Clearfog platform
> > indicates that the receive path fails to detect LPI over RGMII.
> > 
> > Signed-off-by: Russell King (Oracle) <[email-masked]>
> > ---
> >  drivers/net/ethernet/marvell/mvneta.c | 127 ++++++++++++++++----------
> >  1 file changed, 79 insertions(+), 48 deletions(-)
> > 
> > diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
> 
> ...
> 
> > +static void mvneta_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,
> > +				     bool tx_clk_stop)
> > +{
> > +	struct mvneta_port *pp = netdev_priv(to_net_dev(config->dev));
> > +	u32 ts, tw, lpi0, lpi1, status;
> > +
> > +	status = mvreg_read(pp, MVNETA_GMAC_STATUS);
> > +	if (status & MVNETA_GMAC_SPEED_1000) {
> > +		/* At 1G speeds, the timer resolution are 1us, and
> > +		 * 802.3 says tw is 16.5us. Round up to 17us.
> > +		 */
> > +		tw = 17;
> > +		ts = timer;
> > +	} else {
> > +		/* At 100M speeds, the timer resolutions are 10us, and
> > +		 * 802.3 says tw is 30us.
> > +		 */
> > +		tw = 3;
> > +		ts = DIV_ROUND_UP(timer, 10);
> >  	}
> > +
> > +	if (ts > 255)
> > +		ts = 255;
> > +
> > +	/* Configure ts */
> > +	lpi0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);
> > +	lpi0 = u32_replace_bits(lpi0, MVNETA_LPI_CTRL_0_TS, ts);
> 
> Hi Russell,
> 
> I think that the val and field arguments to u32_replace_bits() are
> inverted here and this should be:
> 
> 	lpi0 = u32_replace_bits(lpi0, ts, MVNETA_LPI_CTRL_0_TS);
> 
> > +	mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi0);
> > +
> > +	/* Configure tw and enable LPI generation */
> > +	lpi1 = mvreg_read(pp, MVNETA_LPI_CTRL_1);
> > +	lpi1 = u32_replace_bits(lpi1, MVNETA_LPI_CTRL_1_TW, tw);
> 
> Ditto.
> 
> > +	lpi1 |= MVNETA_LPI_CTRL_1_REQUEST_ENABLE;
> > +	mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi1);
> >  }
> >  
> >  static const struct phylink_mac_ops mvneta_phylink_ops = {
> 
> Flagged by clang-19 and gcc-14 W=1 builds.
> 
> ...

Sorry for more noise, and perhaps this is obvious.
But a similar problem seems to also exists in the following patch,
[PATCH] net: mvpp2: add EEE implementation.