From: Simon Horman <horms@kernel•org>
To: Kory Maincent <kory.maincent@bootlin•com>
Cc: "Andrew Lunn" <andrew@lunn•ch>,
"Heiner Kallweit" <hkallweit1@gmail•com>,
"Russell King" <linux@armlinux•org.uk>,
"David S. Miller" <davem@davemloft•net>,
"Eric Dumazet" <edumazet@google•com>,
"Jakub Kicinski" <kuba@kernel•org>,
"Paolo Abeni" <pabeni@redhat•com>,
"Marek Behún" <kabel@kernel•org>,
"Richard Cochran" <richardcochran@gmail•com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin•com>,
"Maxime Chevallier" <maxime.chevallier@bootlin•com>,
linux-kernel@vger•kernel.org, netdev@vger•kernel.org,
"Russell King" <rmk+kernel@armlinux•org.uk>
Subject: Re: [PATCH net-next v2 2/2] net: phy: Add Marvell PHY PTP support
Date: Tue, 8 Apr 2025 16:49:34 +0100 [thread overview]
Message-ID: <20250408154934.GZ395307@horms.kernel.org> (raw)
In-Reply-To: <20250407-feature_marvell_ptp-v2-2-a297d3214846@bootlin.com>
On Mon, Apr 07, 2025 at 04:03:01PM +0200, Kory Maincent wrote:
> From: Russell King <rmk+kernel@armlinux•org.uk>
>
> From: Russell King <rmk+kernel@armlinux•org.uk>
>
> Add PTP basic support for Marvell 88E151x PHYs. These PHYs support
> timestamping the egress and ingress of packets, but does not support
> any packet modification.
>
> The PHYs support hardware pins for providing an external clock for the
> TAI counter, and a separate pin that can be used for event capture or
> generation of a trigger (either a pulse or periodic). This code does
> not support either of these modes.
>
> The driver takes inspiration from the Marvell 88E6xxx DSA and DP83640
> drivers. The hardware is very similar to the implementation found in
> the 88E6xxx DSA driver, but the access methods are very different,
> although it may be possible to create a library that both can use
> along with accessor functions.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux•org.uk>
>
> Add support for interruption.
> Fix L2 PTP encapsulation frame detection.
> Fix first PTP timestamp being dropped.
> Fix Kconfig to depends on MARVELL_PHY.
> Update comments to use kdoc.
>
> Co-developed-by: Kory Maincent <kory.maincent@bootlin•com>
> Signed-off-by: Kory Maincent <kory.maincent@bootlin•com>
Hi Kory,
Some minor feedback from my side.
> ---
>
> Russell I don't know which email I should use, so I keep your old SOB.
Russell's SOB seems to be missing.
...
> diff --git a/drivers/net/phy/marvell/marvell_tai.c b/drivers/net/phy/marvell/marvell_tai.c
...
> +/* Read the global time registers using the readplus command */
> +static u64 marvell_tai_clock_read(const struct cyclecounter *cc)
> +{
> + struct marvell_tai *tai = cc_to_tai(cc);
> + struct phy_device *phydev = tai->phydev;
> + int err, oldpage, lo, hi;
> +
> + oldpage = phy_select_page(phydev, MARVELL_PAGE_PTP_GLOBAL);
> + if (oldpage >= 0) {
> + /* 88e151x says to write 0x8e0e */
> + ptp_read_system_prets(tai->sts);
> + err = __phy_write(phydev, PTPG_READPLUS_COMMAND, 0x8e0e);
> + ptp_read_system_postts(tai->sts);
> + lo = __phy_read(phydev, PTPG_READPLUS_DATA);
> + hi = __phy_read(phydev, PTPG_READPLUS_DATA);
> + }
If the condition above is not met then err, lo, and hi may be used
uninitialised below.
Flagged by W=1 builds with clang 20.1.2, and Smatch.
> + err = phy_restore_page(phydev, oldpage, err);
> +
> + if (err || lo < 0 || hi < 0)
> + return 0;
> +
> + return lo | hi << 16;
> +}
...
> +int marvell_tai_get(struct marvell_tai **taip, struct phy_device *phydev)
> +{
> + struct marvell_tai *tai;
> + unsigned long overflow_ms;
> + int err;
> +
> + err = marvell_tai_global_config(phydev);
> + if (err < 0)
> + return err;
> +
> + tai = kzalloc(sizeof(*tai), GFP_KERNEL);
> + if (!tai)
> + return -ENOMEM;
> +
> + mutex_init(&tai->mutex);
> +
> + tai->phydev = phydev;
> +
> + /* This assumes a 125MHz clock */
> + tai->cc_mult = 8 << 28;
> + tai->cc_mult_num = 1 << 9;
> + tai->cc_mult_den = 15625U;
> +
> + tai->cyclecounter.read = marvell_tai_clock_read;
> + tai->cyclecounter.mask = CYCLECOUNTER_MASK(32);
> + tai->cyclecounter.mult = tai->cc_mult;
> + tai->cyclecounter.shift = 28;
> +
> + overflow_ms = (1ULL << 32 * tai->cc_mult * 1000) >>
> + tai->cyclecounter.shift;
> + tai->half_overflow_period = msecs_to_jiffies(overflow_ms / 2);
> +
> + timecounter_init(&tai->timecounter, &tai->cyclecounter,
> + ktime_to_ns(ktime_get_real()));
> +
> + tai->caps.owner = THIS_MODULE;
> + snprintf(tai->caps.name, sizeof(tai->caps.name), "Marvell PHY");
> + /* max_adj of 1000000 is what MV88E6xxx DSA uses */
> + tai->caps.max_adj = 1000000;
> + tai->caps.adjfine = marvell_tai_adjfine;
> + tai->caps.adjtime = marvell_tai_adjtime;
> + tai->caps.gettimex64 = marvell_tai_gettimex64;
> + tai->caps.settime64 = marvell_tai_settime64;
> + tai->caps.do_aux_work = marvell_tai_aux_work;
> +
> + tai->ptp_clock = ptp_clock_register(&tai->caps, &phydev->mdio.dev);
> + if (IS_ERR(tai->ptp_clock)) {
> + kfree(tai);
tai is freed on the line above, but dereferenced on the line below.
Flagged by Smatch.
> + return PTR_ERR(tai->ptp_clock);
> + }
> +
> + ptp_schedule_worker(tai->ptp_clock, tai->half_overflow_period);
> +
> + spin_lock(&tai_list_lock);
> + list_add_tail(&tai->tai_node, &tai_list);
> + spin_unlock(&tai_list_lock);
> +
> + *taip = tai;
> +
> + return 0;
> +}
...
next prev parent reply other threads:[~2025-04-08 15:49 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-07 14:02 [PATCH net-next v2 0/2] Add Marvell PHY PTP support Kory Maincent
2025-04-07 14:03 ` [PATCH net-next v2 1/2] net: phy: Move Marvell PHY drivers to its own subdirectory Kory Maincent
2025-04-07 14:03 ` [PATCH net-next v2 2/2] net: phy: Add Marvell PHY PTP support Kory Maincent
2025-04-07 14:15 ` Kory Maincent
2025-04-08 15:49 ` Simon Horman [this message]
2025-04-08 17:32 ` Russell King (Oracle)
2025-04-09 8:18 ` Kory Maincent
2025-04-09 8:33 ` Russell King (Oracle)
2025-04-09 8:48 ` Kory Maincent
2025-04-09 12:16 ` Russell King (Oracle)
2025-04-09 12:38 ` Kory Maincent
2025-04-09 13:35 ` Russell King (Oracle)
2025-04-09 16:04 ` Kory Maincent
2025-04-09 17:34 ` Russell King (Oracle)
2025-04-09 22:38 ` Russell King (Oracle)
2025-04-10 4:16 ` Richard Cochran
2025-04-10 7:44 ` Russell King (Oracle)
2025-04-21 11:20 ` Richard Cochran
2025-04-10 9:17 ` Kory Maincent
2025-04-10 15:41 ` Russell King (Oracle)
2025-04-10 16:02 ` Kory Maincent
2025-04-10 18:16 ` Russell King (Oracle)
2025-04-10 19:40 ` Russell King (Oracle)
2025-04-11 8:01 ` Kory Maincent
2025-04-11 8:25 ` Russell King (Oracle)
2025-04-09 8:07 ` Kory Maincent
2025-04-11 15:53 ` Simon Horman
2025-04-09 15:34 ` Russell King (Oracle)
2025-04-09 16:01 ` Kory Maincent
2025-04-07 14:08 ` [PATCH net-next v2 0/2] " Andrew Lunn
2025-04-07 14:31 ` Kory Maincent
2025-04-07 16:02 ` Russell King (Oracle)
2025-04-07 16:20 ` Kory Maincent
2025-04-07 16:32 ` Russell King (Oracle)
2025-04-07 16:39 ` Kory Maincent
2025-04-08 20:38 ` Russell King (Oracle)
2025-04-09 8:31 ` Kory Maincent
2025-04-09 8:35 ` Russell King (Oracle)
2025-04-09 8:38 ` Vladimir Oltean
2025-04-09 8:48 ` Kory Maincent
2025-04-09 9:28 ` Russell King (Oracle)
2025-04-09 8:46 ` Kory Maincent
2025-04-09 9:29 ` Russell King (Oracle)
2025-04-09 12:23 ` Kory Maincent
2025-04-09 12:46 ` Maxime Chevallier
2025-04-09 14:49 ` Kory Maincent
2025-04-09 15:10 ` Maxime Chevallier
2025-04-09 15:14 ` Kory Maincent
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