Subject: Re: [PATCH v24 02/11] cxl/sfc: Map cxl regs

From: Jonathan Cameron <[email-masked]>
Date: Tue, 24 Mar 2026 16:33:55 +0000

On Mon, 23 Mar 2026 11:31:08 +0000
[email-masked] wrote:

> From: Alejandro Lucero <[email-masked]>
> 
> Export cxl core functions for a Type2 driver being able to discover and
> map the device registers.
> 
> Use it in sfc driver cxl initialization.
> 
> Signed-off-by: Alejandro Lucero <[email-masked]>
> Reviewed-by: Dan Williams <[email-masked]>
> Reviewed-by: Jonathan Cameron <[email-masked]>
> Reviewed-by: Dave Jiang <[email-masked]>
> Reviewed-by: Ben Cheatham <[email-masked]>
> Acked-by: Edward Cree <[email-masked]>
One trivial thing that you might want to tidy up.

Thanks,

Jonathan

> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> index 8e0481d8dced..7917118e4eba 100644
> --- a/drivers/net/ethernet/sfc/efx_cxl.c
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -7,6 +7,8 @@
>  
>  #include <linux/pci.h>
>  
> +#include <cxl/cxl.h>
> +#include <cxl/pci.h>
>  #include "net_driver.h"
>  #include "efx_cxl.h"
>  
> @@ -18,6 +20,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>  	struct pci_dev *pci_dev = efx->pci_dev;
>  	struct efx_cxl *cxl;
>  	u16 dvsec;
> +	int rc;
>  
>  	probe_data->cxl_pio_initialised = false;
>  
> @@ -44,6 +47,30 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>  	if (!cxl)
>  		return -ENOMEM;
>  
> +	rc = cxl_pci_setup_regs(pci_dev, CXL_REGLOC_RBI_COMPONENT,
> +				&cxl->cxlds.reg_map);
> +	if (rc) {
> +		pci_err(pci_dev, "No component registers\n");
> +		return rc;
> +	}
> +
> +	if (!cxl->cxlds.reg_map.component_map.hdm_decoder.valid) {
> +		pci_err(pci_dev, "Expected HDM component register not found\n");
> +		return -ENODEV;
> +	}
> +
> +	if (!cxl->cxlds.reg_map.component_map.ras.valid) {
> +		pci_err(pci_dev, "Expected RAS component register not found\n");
> +		return -ENODEV;
> +	}
> +
> +	/*
Networking code. So wrong style.

Ah the fun of patches that touch drivers/net and drivers/cxl :)

> +	 * Set media ready explicitly as there are neither mailbox for checking
> +	 * this state nor the CXL register involved, both not mandatory for
> +	 * type2.
> +	 */
> +	cxl->cxlds.media_ready = true;
> +
>  	probe_data->cxl = cxl;
>  
>  	return 0;