Subject: Re: [PATCH, RESEND] Add MWI workaround for Tulip DC21143

From: Peter Horton <[email-masked]>
Date: Mon, 27 Mar 2006 13:39:00 +0100

Martin Michlmayr wrote:
> * Francois Romieu <[email-masked]> [2006-03-09 23:44]:
>   
>>> So when compiling for Cobalt, we work around the hardware bug, while for other
>>> platforms, we just disable MWI?
>>>
>>> Wouldn't it be possible to always (I mean, when a rev 65 chip is detected)
>>> work around the bug?
>>>       
>> Of course it is possible but it is not the same semantic as the initial
>> patch (not that I know if it is right or not).
>>
>> So:
>> - does the issue exist beyond Cobalt hosts ?
>> - is the fix Cobalt-only ?
>>     
>
> I don't think anyone has replied to this message yet.  My
> understanding is that it's not Cobalt only but a problem in a specific
> revision of the chip, which the Cobalt happens to use.  However, I'd
> be glad if somone else could comment.  Peter, you read the errata
> right?
>   

According to the errata it applies to all DEC 21143-PD and 21143-TD 
which are the chips with the revision code 0x41 (65). The errata states 
the receive buffers should not end on a cache aligned boundary when 
using MWI otherwise the receiver will not close the last descriptor.

P.