Subject: Re: Fw: [Bug 54231] r8169 driver regression caused by the commit aee77e4accbeb2c86b1d294cd84fec4a12dde3bd

From: Tomi Orava <[email-masked]>
Date: Tue, 26 Feb 2013 20:41:07 +0200

On 02/25/2013 12:04 AM, Francois Romieu wrote:
> Tomi Orava <[email-masked]> :
>> On 02/23/2013 01:09 AM, Francois Romieu wrote:
> [...]
>> I started re-testing after your comment and figured out that the
>> real problem seems to lie somehow with jumbo frames. Ie. the DMA burst
>> changes do not actually prevent the hangs at all in my case. The
>> catch here, that I missed previously, was that for some interesting
>> reason the NIC will fail in a couple of minutes with a suitable traffic
>> if the jumbo frames (mtu 4000) have been enabled from the start.
>> However, if I enable the jumbo frames manually after the system
>> has already started up, there are no stability issues related to network.
> 
> If you mean that 'ip link set dev ... mtu 4000; ip link set dev ... up'
> fails whereas 'ip link set dev ... up; ip link set dev ... mtu 4000'
> works, the patch below is a candidate:

Yes, this fits exactly my problem. I tested this change on 3.7.9 and
on 3.4.33 and I had no network hangs anymore.

Thanks!

Tomi

> diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
> index 8900398..af99498 100644
> --- a/drivers/net/ethernet/realtek/r8169.c
> +++ b/drivers/net/ethernet/realtek/r8169.c
> @@ -4766,7 +4766,7 @@ static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
>  	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
>  
>  	rtl_tx_performance_tweak(pdev,
> -		(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
> +		(0x2 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
>  }
>  
>  static void rtl_hw_start_8168bef(struct rtl8169_private *tp)
> ---
> 
> [...]
>>> Tomi, what does lspci say about your 8168b device ?
>>
>> The NIC information is:
>>
>> 03:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI
>> Express Gigabit Ethernet controller (rev 01)
>>
>> 03:00.0 0200: 10ec:8168 (rev 01)
> 
> Ok, so the first hunk of the patch that Stephen forwarded would not make
> any difference for your chipset.
>