Subject: Re: [PATCH] net/cpsw: don't disable_irqs() after an interrupt has been received.

From: Mugunthan V N <[email-masked]>
Date: Wed, 17 Apr 2013 17:14:04 +0530

On 4/17/2013 4:19 PM, Sebastian Andrzej Siewior wrote:
> On 04/17/2013 12:08 PM, Mugunthan V N wrote:
>> Mine shows [    0.000000] AM335X ES2.0 (neon )
>>
>> In Beagle bone (silicon revision 1.0) there is a bug in CPSW irq in
>> Silicon, please refer
>> http://www.ti.com/lit/er/sprz360e/sprz360e.pdf  Advisory 1.0.9
>>
>> Beagle bone black has Silicon revision 2.0 where the bug is fixed and
>> you are able
>> to test it properly and it hangs in my bone black as the IRQ is properly
>> connected
>> to A8
> Okay. This would explain things. So let me try it again without
> breaking the new one. If you disable_irq() there is no need to mask the
> source in chip, right?
>
Yes, May be we can try. If the performance is more then we can think of 
removing
disabling interrupt in CPSW and use only disable ARM irq.

Regards
Mugunthan V N