Subject: Re: [PATCH net-next v1 1/1] net: fec: Fix RMON registers on imx6

From: Jim Baxter <[email-masked]>
Date: Mon, 1 Jul 2013 14:52:59 +0100

On 01/07/13 14:42, Chris Healy wrote:
> The comment one line up should change to reflect the functional change. 
> Something like:  "Enable the MIB logic"
> 
> 
> On Mon, Jul 1, 2013 at 3:31 AM, Jim Baxter <[email-masked]
> <mailto:[email-masked]>> wrote:
> 
>     commit 38ae92d "fec: Add support for reading
>     RMON registers" causes the imx6Q to crash.
> 
>     This fixes it by only enabling the RMON registers, the
>     registers are already cleared by the MAC being reset.
> 
>     Signed-off-by: Jim Baxter <[email-masked]
>     <mailto:[email-masked]>>
>     ---
>     Change v1 to v2
>     Removed per processor change and just set bit 31 to 0.
> 
>      drivers/net/ethernet/freescale/fec_main.c |    5 +----
>      1 file changed, 1 insertion(+), 4 deletions(-)
> 
>     diff --git a/drivers/net/ethernet/freescale/fec_main.c
>     b/drivers/net/ethernet/freescale/fec_main.c
>     index ed6180e..c772df1 100644
>     --- a/drivers/net/ethernet/freescale/fec_main.c
>     +++ b/drivers/net/ethernet/freescale/fec_main.c
>     @@ -606,10 +606,7 @@ fec_restart(struct net_device *ndev, int duplex)
> 
>      #ifndef CONFIG_M5272
>             /* Disable, clear, and enable the MIB */
>     -       writel(1 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
>     -       for (i = RMON_T_DROP; i < IEEE_R_OCTETS_OK; i++)
>     -               writel(0, fep->hwp + i);
>     -       writel(0, fep->hwp + FEC_MIB_CTRLSTAT);
>     +       writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
>      #endif
> 
>             /* And last, enable the transmit and receive processing */
>     --
>     1.7.10.4
> 
> 

Hi Chris,
Does "Enable the MIB statistic event counters" sound OK?

Thank you,
Jim