Subject: Re: [PATCH V2 1/1] net: can: Remodel FlexCAN register read/write APIs for BE instances

From: Marc Kleine-Budde <[email-masked]>
Date: Fri, 04 Jul 2014 15:41:08 +0200

On 07/04/2014 03:01 PM, Bhupesh Sharma wrote:
> The FlexCAN IP on certain SoCs like (Freescale's LS1021A) is
> modelled in a big-endian fashion, i.e. the registers and the
> message buffers are organized in a BE way.
> 
> More details about the LS1021A SoC can be seen here:
> http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=LS1021A&nodeId=018rH325E4017B#
> 
> This patch ensures that the register read/write APIs are remodelled
> to address such cases, while ensuring that existing platforms (where
> the FlexCAN IP was modelled in LE way) do not break.
> 
> Tested on LS1021A-QDS board.
> 
> Signed-off-by: Bhupesh Sharma <[email-masked]>
> ---
> Changes since v1:
> - Addressed Marc's review comments.
> - Also tried on ARM big-endian kernel
> 
> Rebased against v3.16-rc2

Please use net-next or linux-can-next, but I think this makes no
difference here.

>  drivers/net/can/flexcan.c |  192 +++++++++++++++++++++++++++------------------
>  1 file changed, 114 insertions(+), 78 deletions(-)

I'm missing the DT documentation update.

[...]

		of_property_read_u32(pdev->dev.of_node,
> @@ -1149,6 +1166,25 @@ static int flexcan_probe(struct platform_device *pdev)
>  	dev->flags |= IFF_ECHO;
>  
>  	priv = netdev_priv(dev);
> +
> +	if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
> +		core_is_little = false;
> +
> +	if (of_property_read_bool(dev->dev.of_node, "big-endian"))
> +		module_is_little = false;
> +
> +	if ((core_is_little && module_is_little) ||
> +	    (!core_is_little && !module_is_little)) {

I think this is broken on PPC, where both core and module are BE. Please
assume native endianess an default, if neither big-endian nor
little-endian is present.

> +		priv->read = flexcan_read_le;
> +		priv->write = flexcan_write_le;
> +	}
> +
> +	if ((!core_is_little && module_is_little) ||
> +	    (core_is_little && !module_is_little)) {
> +		priv->read = flexcan_read_be;
> +		priv->write = flexcan_write_be;
> +	}
> +
>  	priv->can.clock.freq = clock_freq;
>  	priv->can.bittiming_const = &flexcan_bittiming_const;
>  	priv->can.do_set_mode = flexcan_set_mode;
> 

Marc

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