Subject: Re: [PATCH net-next v3] Add support of Cavium Liquidio ethernet adapters

From: Lino Sanfilippo <[email-masked]>
Date: Fri, 19 Dec 2014 21:44:15 +0100

Hi,

On 19.12.2014 04:25, Raghu Vatsavayi wrote:
> +
> +static int cn6xxx_soft_reset(struct octeon_device *oct)
> +{
> +	octeon_write_csr64(oct, CN66XX_WIN_WR_MASK_REG, 0xFF);
> +
> +	lio_dev_dbg(oct, "BIST enabled for soft reset\n");
> +
> +	OCTEON_PCI_WIN_WRITE(oct, CN66XX_CIU_SOFT_BIST, 1);
> +	octeon_write_csr64(oct, CN66XX_SLI_SCRATCH1, 0x1234ULL);
> +
> +	OCTEON_PCI_WIN_READ(oct, CN66XX_CIU_SOFT_RST);
> +	OCTEON_PCI_WIN_WRITE(oct, CN66XX_CIU_SOFT_RST, 1);
> +
> +	/* Wait for 10ms as Octeon resets. */
> +	mdelay(10);
> +
> +	if (octeon_read_csr64(oct, CN66XX_SLI_SCRATCH1) == 0x1234ULL) {
> +		lio_dev_err(oct, "Soft reset failed\n");
> +		return 1;
> +	}

Before the delay you should probably make sure that the writes are
flushed to avoid pci write posting.

> +
> +static int cn68xx_soft_reset(struct octeon_device *oct)
> +{
> +	octeon_write_csr64(oct, CN68XX_WIN_WR_MASK_REG, 0xFF);
> +
> +	lio_dev_dbg(oct, "BIST enabled for CN68XX soft reset\n");
> +	OCTEON_PCI_WIN_WRITE(oct, CN68XX_CIU_SOFT_BIST, 1);
> +
> +	octeon_write_csr64(oct, CN68XX_SLI_SCRATCH1, 0x1234ULL);
> +
> +	OCTEON_PCI_WIN_READ(oct, CN68XX_CIU_SOFT_RST);
> +	OCTEON_PCI_WIN_WRITE(oct, CN68XX_CIU_SOFT_RST, 1);
> +
> +	/* Wait for 100ms as Octeon resets. */
> +	mdelay(100);
> +
> +	if (octeon_read_csr64(oct, CN68XX_SLI_SCRATCH1) == 0x1234ULL) {
> +		lio_dev_err(oct, "Soft reset failed\n");
> +		return 1;
> +	}

same here.

Regards,
Lino