Subject: Re: [PATCH 01/12] net: axienet: Support for RGMII

From: Florian Fainelli <[email-masked]>
Date: Tue, 05 May 2015 21:32:29 -0700

Le 05/05/15 05:54, John Linn a écrit :
> Hi Michal,
> 
> I removed the mailing lists.
> 
> One of the issues we see in the field is that the value of PHY_INTERFACE_MODE_RGMII_ID causes a delay on the RX and TX side in the PHY to align the clock and the data. Yet this does not work on every board such that         PHY_INTERFACE_MODE_RGMII_RXID or        PHY_INTERFACE_MODE_RGMII_TXID must be used.
> 
> I realize that's a pain.  Sometimes the PHY driver allows register values (like Marvell) to be setup on the PHY node which helps, but not always.  It seems that the information in the device tree is not adequate to describe the hardware. I've not looked to see what others do as maybe this is a common problem, just thought I should pass on the problem.

There is a standard Device Tree node property described in
Documentation/devicetree/bindings/net/ethernet.txt: phy-mode which
allows you to specify exactly this: whether you should have your TX data
and clocks aligned or shifted.

See include/linux/phy.h in the kernel for how the string translates into
a given PHY_INTERFACE_MODE_* value.

If your concern is more about whether the fact that given PHY driver
should support RGMII_ID, RGMII_TXID and RGMII_RXID, all of this is
typically extremely specific to the board (PCB), Ethernet MAC and
Ethernet PHY, so unless there is the need to configure that, it may just
be that people use the default values that happen to work for them
without much research on the subject.

> 
> Thanks
> John
> 
> -----Original Message-----
> From: Michal Simek [mailto:[email-masked]] On Behalf Of Michal Simek
> Sent: Tuesday, May 05, 2015 4:26 AM
> To: [email-masked]
> Cc: Srikanth Thokala; Soren Brinkmann; [email-masked]; John Linn; Anirudha Sarangi; [email-masked]; [email-masked]
> Subject: [PATCH 01/12] net: axienet: Support for RGMII
> 
> From: Srikanth Thokala <[email-masked]>
> 
> This patch adds support for the RGMII. The h/w configuration parameter C_PHY_TYPE, which represents the interface configured in the design, is used to differentiate various interfaces supported by AXI Ethernet.
> 
> Signed-off-by: Srikanth Thokala <[email-masked]>
> Signed-off-by: Michal Simek <[email-masked]>
> ---
> 
>  drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 28b7e7d9c272..0ab607732bb4 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -925,9 +925,16 @@ static int axienet_open(struct net_device *ndev)
>                 return ret;
> 
>         if (lp->phy_node) {
> -               lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
> +               if (lp->phy_type == XAE_PHY_TYPE_GMII) {
> +                       lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
>                                              axienet_adjust_link, 0,
>                                              PHY_INTERFACE_MODE_GMII);
> +               } else if (lp->phy_type == XAE_PHY_TYPE_RGMII_2_0) {
> +                       lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
> +                                            axienet_adjust_link, 0,
> +                                            PHY_INTERFACE_MODE_RGMII_ID);
> +               }
> +
>                 if (!lp->phy_dev) {
>                         dev_err(lp->dev, "of_phy_connect() failed\n");
>                         return -ENODEV;
> --
> 2.3.5
> 
> 
> 
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-- 
Florian