Subject: Re: [PATCH v8 1/3] can: Allwinner A10/A20 CAN Controller support - Devicetree bindings

From: Marc Kleine-Budde <[email-masked]>
Date: Thu, 17 Sep 2015 10:04:56 +0200

On 09/16/2015 01:21 PM, Gerhard Bertelsmann wrote:
> Devicetree bindings for Allwinner A10/A20 CAN
> 
> Signed-off-by: Gerhard Bertelsmann <[email-masked]>
> ---
> 
>  .../devicetree/bindings/net/can/sun4i_can.txt      |  38 +
>  1 files changed, 389 insertions(+)
> 
> 
> diff --git a/Documentation/devicetree/bindings/net/can/sun4i_can.txt b/Documentation/devicetree/bindings/net/can/sun4i_can.txt
> new file mode 100644
> index 0000000..cd0f50c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/can/sun4i_can.txt
> @@ -0,0 +1,38 @@
> +Allwinner A10/A20 CAN controller Device Tree Bindings
> +-----------------------------------------------------
> +
> +Required properties:
> +- compatible: "allwinner,sun4i-a10-can"
> +- reg: physical base address and size of the Allwinner A10/A20 CAN register map.
> +- interrupts: interrupt specifier for the sole interrupt.
> +- clock: phandle and clock specifier.
> +
> +
> +Example
> +-------
> +
> +SoC common .dtsi file:
> +
> +	can0_pins_a: can0@0 {
> +		allwinner,pins = "PH20","PH21";
> +		allwinner,function = "can";
> +		allwinner,drive = <0>;
> +		allwinner,pull = <0>;
> +	};
> +...
> +	can0: can@01c2bc00 {
> +		compatible = "allwinner,sun4i-a10-can";
> +		reg = <0x01c2bc00 0x400>;
> +		interrupts = <0 26 4>;
> +		clocks = <&apb1_gates 4>;
> +		status = "disabled";
> +	};

What about adding this snippet to SoC where the CAN core is available?
Maxime, what's the policy on sinxi? If you give me an Ack I'd like to
take the series via linux-can-next (and to net-next) upstream.

Marc

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