Subject: Re: [PATCH 0/3] arm64: mx93: etherrnet: set TX_CLK in RMII mode

From: Steffen Trumtrar <[email-masked]>
Date: Tue, 23 Apr 2024 08:43:58 +0200

Hi,

On 2024-04-22 at 11:28 +02, Sébastien Szymanski <[email-masked]> wrote: 
 
> Hello,  On 4/22/24 10:46, Steffen Trumtrar wrote: 
> > This series adds support for setting the TX_CLK direction in the eQOS ethernet core on the i.MX93 when RMII mode is used.  According to AN14149, when the i.MX93 ethernet controller is used in RMII mode, the TX_CLK *must* be set to output mode. 
>  Must ? I don't think that is true. Downstream NXP kernel has an option to set TX_CLK as an input: 
>

re-reading that passage again, it only says "other registers that must be configured" and that the ENET_QOS_CLK_TX_CLK_SEL bit "is 0b1" for RMII. So, maybe you are right. 

Thanks,
Steffen

> https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/Documentation/devicetree/bindings/net/nxp%2Cdwmac-imx.yaml#L69
> 
> https://github.com/nxp-imx/linux-imx/commit/fbc17f6f7919d03c275fc48b0400c212475b60ec
> 

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