Subject: Re: [PATCH v2 net-next] net: dsa: mv88e6xxx: Fix validation of built-in PHYs on 6095/6097

From: "Russell King (Oracle)" <[email-masked]>
Date: Sun, 13 Feb 2022 18:58:39 +0000

On Sun, Feb 13, 2022 at 07:51:54PM +0100, Tobias Waldekranz wrote:
> These chips have 8 built-in FE PHYs and 3 SERDES interfaces that can
> run at 1G. With the blamed commit, the built-in PHYs could no longer
> be connected to, using an MII PHY interface mode.
> 
> Create a separate .phylink_get_caps callback for these chips, which
> takes the FE/GE split into consideration.
> 
> Fixes: 2ee84cfefb1e ("net: dsa: mv88e6xxx: convert to phylink_generic_validate()")
> Signed-off-by: Tobias Waldekranz <[email-masked]>

Reviewed-by: Russell King (Oracle) <[email-masked]>

Thanks!

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