Subject: Re: [PATCH 3/3] net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct location

From: "Russell King (Oracle)" <[email-masked]>
Date: Tue, 31 May 2022 12:55:18 +0100

On Tue, May 31, 2022 at 05:00:58PM +0530, Siddharth Vadapalli wrote:
> In TI's J7200 SoC CPSW5G ports, each of the 4 ports can be configured
> as a QSGMII main or QSGMII-SUB port. This configuration is performed
> by phy-gmii-sel driver on invoking the phy_set_mode_ext() function.
> 
> It is necessary for the QSGMII main port to be configured before any of
> the QSGMII-SUB interfaces are brought up. Currently, the QSGMII-SUB
> interfaces come up before the QSGMII main port is configured.
> 
> Fix this by moving the call to phy_set_mode_ext() from
> am65_cpsw_nuss_ndo_slave_open() to am65_cpsw_nuss_init_slave_ports(),
> thereby ensuring that the QSGMII main port is configured before any of
> the QSGMII-SUB ports are brought up.

This sounds like "if we're configured via port->slave.phy_if to be in
QSGMII mode, then the serdes PHY needs to be configured before any of
the QSGMII ports are used". Doesn't that mean that if
port->slave.phy_if is QSGMII, then the port _only_ supports QSGMII
mode, and conversely, the port doesn't support QSGMII unless firmware
said it could be.

So, doesn't that mean am65_cpsw_nuss_init_port_ndev() should indicate
only QSGMII, or only the RGMII modes, but never both together?

-- 
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