Subject: Re: [PATCH 5/8] net: ethernet: ti: am65-cpsw: Add support for fixed-link configuration

From: "Russell King (Oracle)" <[email-masked]>
Date: Thu, 15 Sep 2022 11:07:23 +0100

Hi,

On Thu, Sep 15, 2022 at 02:58:52PM +0530, Siddharth Vadapalli wrote:
> Hello Russell,
> 
> On 14/09/22 21:39, Russell King (Oracle) wrote:
> > On Wed, Sep 14, 2022 at 03:20:50PM +0530, Siddharth Vadapalli wrote:
> >> Check for fixed-link in am65_cpsw_nuss_mac_config() using struct
> >> am65_cpsw_slave_data's phy_node property to obtain fwnode. Since
> >> am65_cpsw_nuss_mac_link_up() is not invoked in fixed-link mode, perform
> >> the relevant operations in am65_cpsw_nuss_mac_config() itself.
> > 
> > Further to my other comments, you also fail to explain that, when in
> > fixed-link SGMII mode, you _emulate_ being a PHY - which I deduce
> > since you are sending the duplex setting and speed settings via the
> > SGMII control word. Also, as SGMII was invented for a PHY to be able
> > to communicate the media negotiation resolution to the MAC, SGMII
> > defines that the PHY fills in the speed and duplex information in
> > the control word to pass it to the MAC, and the MAC acknowledges this
> > information. There is no need (and SGMII doesn't permit) the MAC to
> > advertise what it's doing.
> > 
> > Maybe this needs to be explained in the commit message?
> 
> I had tested SGMII fixed-link mode using a bootstrapped ethernet layer-1
> PHY. Based on your clarification in the previous mails that there is an
> issue with the fixed-link mode which I need to debug, I assume that what
> you are referring to here also happens to be a consequence of that.
> Please let me know if I have misunderstood what you meant to convey.

I think what you're saying is that you have this setup:

  ethernet MAC <--SGMII link--> ethernet PHY <---> media

which you are operating in fixed link mode?

>From the SGMII specification: "This is achieved by using the Auto-
Negotiation functionality defined in Clause 37 of the IEEE
Specification 802.3z. Instead of the ability advertisement, the PHY
sends the control information via its tx_config_Reg[15:0] as specified
in Table 1 whenever the control information changes. Upon receiving
control information, the MAC acknowledges the update of the control
information by asserting bit 14 of its tx_config_reg{15:0] as specified
in Table 1."

For the control word sent from the MAC to the PHY, table 1 specifies a
value of 0x4001. All the zero bits in that word which are zero are
marked as "Reserved for future use." There are no fields for speed and
duplex in this acknowledgement word to the PHY.

I hope this clears up my point.

-- 
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