Subject: Re: [PATCH v1] wifi: ath9k: fix AR9003 mac hardware hang check register offset calculation

From: Simon Horman <[email-masked]>
Date: Sat, 22 Apr 2023 10:50:52 +0200

On Thu, Apr 20, 2023 at 10:43:16PM +0200, Peter Seiderer wrote:
> Fix ath9k_hw_verify_hang()/ar9003_hw_detect_mac_hang() register offset
> calculation (do not overflow the shift for the second register/queues
> above five, use the register layout described in the comments above
> ath9k_hw_verify_hang() instead).
> 
> Fixes: 222e04830ff0 ("ath9k: Fix MAC HW hang check for AR9003")
> 
> Reported-by: Gregg Wonderly <[email-masked]>
> Link: https://lore.kernel.org/linux-wireless/[email-masked]/
> Signed-off-by: Peter Seiderer <[email-masked]>
> ---
> Notes:
>   - tested with MikroTik R11e-5HnD/Atheros AR9300 Rev:4 (lspci: 168c:0033
>     Qualcomm Atheros AR958x 802.11abgn Wireless Network Adapter (rev 01))
>     card
> ---
>  drivers/net/wireless/ath/ath9k/ar9003_hw.c | 27 ++++++++++++++--------
>  1 file changed, 18 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
> index 4f27a9fb1482..0ccf13a35fb4 100644
> --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
> +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
> @@ -1099,17 +1099,22 @@ static bool ath9k_hw_verify_hang(struct ath_hw *ah, unsigned int queue)
>  {
>  	u32 dma_dbg_chain, dma_dbg_complete;
>  	u8 dcu_chain_state, dcu_complete_state;
> +	unsigned int dbg_reg, reg_offset;
>  	int i;
>  
> -	for (i = 0; i < NUM_STATUS_READS; i++) {
> -		if (queue < 6)
> -			dma_dbg_chain = REG_READ(ah, AR_DMADBG_4);
> -		else
> -			dma_dbg_chain = REG_READ(ah, AR_DMADBG_5);
> +	if (queue < 6) {
> +		dbg_reg = AR_DMADBG_4;
> +		reg_offset = i * 5;

Hi Peter,

unless my eyes are deceiving me, i is not initialised here.

> +	} else {
> +		dbg_reg = AR_DMADBG_5;
> +		reg_offset = (i - 6) * 5;

Or here.

> +	}
>  
> +	for (i = 0; i < NUM_STATUS_READS; i++) {
> +		dma_dbg_chain = REG_READ(ah, dbg_reg);
>  		dma_dbg_complete = REG_READ(ah, AR_DMADBG_6);
>  
> -		dcu_chain_state = (dma_dbg_chain >> (5 * queue)) & 0x1f;
> +		dcu_chain_state = (dma_dbg_chain >> reg_offset) & 0x1f;
>  		dcu_complete_state = dma_dbg_complete & 0x3;
>  
>  		if ((dcu_chain_state != 0x6) || (dcu_complete_state != 0x1))