Subject: Re: [PATCH v1] net: sfp: add quirks for ODI DFP-34X-2C2

From: "Russell King (Oracle)" <[email-masked]>
Date: Wed, 28 Feb 2024 11:15:39 +0000

On Wed, Feb 28, 2024 at 06:42:55PM +0800, Shengyu Qu wrote:
> Hi Russell,
> 
> I got contact with someone that has access to this chip's datasheet.
> He tolds me that according to the datasheet, this chip
> "supports a rate adaptor feature, which is a Realtek proprietary SERDES
> mechanism."
> " When the chip's SERDES operates in Rate adaptor mode, the SERDES speed
> is fixed at 2.5Gbps and the Ethernet speed cannot be higher than the
> SERDES speed.
> The SOC need not follow the Ethernet link speed, and cannot change the
> SERDES speed in this mode. There is a data flow control mechanism to
> ensure correct data transmission."
> 
> Is it enough to put this into the commit information?

I think you need to read that again and understand it. Specifically
"the SERDES speed is fixed at 2.5Gbps". When operating in this mode
(rate adapter mode) this would mean the SERDES (which is what talks
to the host) is fixed at 2500base-X and is fundamentally incompatible
and incapable of linking with a host operating at 1000base-X.

"Rate adapter" is a term that is used by manufacturers to mean that
a e.g. PHY is able to operate at several different speeds on its
media side while operating at a specific speed on its host side.
E.g. a PHY that presents at 10GBASE-R host interface but supports
media at 10M, 100M, 1G, 2.5G and 5G speeds. Typically, it controls
the rate at which the host sends packets by sending PAUSE frames to
the host.

This feature is irrelevant to the abilities of the module to link at
either 1000base-X or 2500base-X with the host.

Thanks.

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