Subject: Re: [PATCH v5 02/16] net: driver: stmmac: Extend CSR calc support

From: "Russell King (Oracle)" <[email-masked]>
Date: Tue, 19 Nov 2024 16:35:21 +0000

On Tue, Nov 19, 2024 at 04:00:08PM +0100, Jan Petrous via B4 Relay wrote:
> From: "Jan Petrous (OSS)" <[email-masked]>
> 
> Add support for CSR clock range up to 800 MHz.
> 
> Signed-off-by: Jan Petrous (OSS) <[email-masked]>
> Reviewed-by: Jacob Keller <[email-masked]>

These look fine.

Doing the calculations:

100M / 42 = 2.38MHz
150M / 62 = 2.42MHz
35M / 16 = 2.19MHz
60M / 26 = 2.31MHz
250M / 102 = 2.45MHz
300M / 124 = 2.42MHz
500M / 204 = 2.45MHz
800M / 324 = 2.47MHz

Since the target MDC clock frequency is 2.5MHz, these all look
reasonable to what is in the comment for the new clock selection
values.

Reviewed-by: Russell King (Oracle) <[email-masked]>

Thanks!

-- 
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