Subject: Re: [PATCH net-next v2 2/2] net: pcs: rzn1-miic: Add support for PHY link active-level configuration

From: "Russell King (Oracle)" <[email-masked]>
Date: Fri, 9 Jan 2026 14:46:21 +0000

On Fri, Jan 09, 2026 at 02:22:50PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <[email-masked]>
> 
> Add support to configure the PHY link signal active level per converter
> using the DT property "renesas,miic-phylink-active-low".
> 
> Introduce the MIIC_PHYLINK register definition and extend the MIIC driver
> with a new `phylink` structure to store the mask and value for PHY link
> configuration. Implement `miic_configure_phylink()` to determine the bit
> position and polarity for each port based on the SoC type, such as RZ/N1
> or RZ/T2H/N2H.
> 
> The accumulated configuration is stored during DT parsing and applied
> later in `miic_probe()` after hardware initialization, since the MIIC
> registers can only be modified safely once the hardware setup is complete.

Please do not re-use "phylink", we have a subsystem in the kernel named
as such, and, for example, it too defines "struct phylink".

> +/**
> + * struct phylink - Phylink configuration
> + * @mask: Mask of phylink bits
> + * @val: Value of phylink bits
> + */
> +struct phylink {
> +	u32 mask;
> +	u32 val;
> +};
> +

You don't get a warning for this, because, although you have:

#include <linux/phylink.h>

which delares "struct phylink" as:

struct phylink;

The definition of this structure is entirely private to
drivers/net/phy/phylink.c and is intentionally not exposed.

By redefining "struct phylink" here, it means that anyone using gdb
is going to run into problems - which version of this struct is the
right one for any particular pointer.

You describe this feature as "PHY-link" and "PHY link" in your commit
and cover messages. Please use "phy_link" and "PHY_LINK" as identifies
for this so that grep can distinguish between your PHY link feature
and the phylink infrastructure.

Thanks.

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