Subject: Re: [PATCH net-next 1/3] net: stmmac: clear half-duplex caps where unsupported

From: "Russell King (Oracle)" <[email-masked]>
Date: Fri, 30 Jan 2026 18:09:09 +0000

On Fri, Jan 30, 2026 at 06:29:23PM +0100, Maxime Chevallier wrote:
> Hi,
> 
> On 30/01/2026 12:10, Russell King (Oracle) wrote:
> > Where a core supports hardware features, but does not indicate support
> > for half-duplex, clear phylink's half-duplex 1G, 100M and 10M
> > capability bits to disallow half-duplex operation and advertisement of
> > these link modes.
> > 
> > This will avoid the need for special code in the PCS driver to do this
> > based on the ESTATUS register bits, as the support in the PCS is
> > dependent on the same synthesis choice as the MAC core.
> > 
> > Signed-off-by: Russell King (Oracle) <[email-masked]>
> 
> Gave it a quick test on socfpga, as this impacts all variants,
> and we seem to be good so,
> 
> Tested-by: Maxime Chevallier <[email-masked]>
> Reviewed-by: Maxime Chevallier <[email-masked]>

If you look at /sys/kernel/debug/stmmaceth/ethX/dma_cap, it should
say whether half duplex is supported (I guess in your case it will
be, it's probably very unlikely not to be.) However, would be worth
knowing whether the if() is taken or not!

-- 
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